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Supporting a Virtual Vector Instruction Set on a Commercial Compute-in-SRAM Accelerator.
Courtney Golden
Dan Ilan
Caroline Huang
Niansong Zhang
Zhiru Zhang
Christopher Batten
Published in:
IEEE Comput. Archit. Lett. (2024)
Keyphrases
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instruction set
floating point
application specific
computer architecture
power consumption
embedded systems
parallel processing
parallel implementation
instruction set architecture
real time
query processing
data processing
level parallelism