Larry T. Pileggi

Publication Activity (10 Years)

Years Active: 2004-2023
Publications (10 Years): 59

Top Topics

Equivalent Circuit

Sparse Matrices

Top Venues

Publications

Aayushya Agarwal, Larry T. Pileggi
An Equivalent Circuit Approach to Distributed Optimization. CoRR (2023)
Shimiao Li, Ján Drgona, Shrirang Abhyankar, Larry T. Pileggi
Power Grid Behavioral Patterns and Risks of Generalization in Applied Machine Learning. CoRR (2023)
Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
Contingency Analyses with Warm Starter using Probabilistic Graphical Model. CoRR (2023)
Matthew Guthaus, Christopher Batten, Erik Brunvand, Pierre-Emmanuel Gaillardon, David Harris, Rajit Manohar, Pinaki Mazumder, Larry T. Pileggi, James E. Stine
NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report. CoRR (2023)
Shimiao Li, Ján Drgona, Shrirang Abhyankar, Larry T. Pileggi
Power Grid Behavioral Patterns and Risks of Generalization in Applied Machine Learning. e-Energy (Companion) (2023)
Aayushya Agarwal, Carmel Fiscko, Soummya Kar, Larry T. Pileggi, Bruno Sinopoli
An Equivalent Circuit Workflow for Unconstrained Optimization. CoRR (2023)
Carmel Fiscko, Aayushya Agarwal, Yihan Ruan, Soummya Kar, Larry T. Pileggi, Bruno Sinopoli
Towards Hyperparameter-Agnostic DNN Training via Dynamical System Insights. CoRR (2023)
Larry T. Pileggi, Siyuan Chen, Keshav Harisrikanth, Guanglin Xu, Ken Mai, Franz Franchetti
A High Throughput Hardware Accelerator for FFTW Codelets: A First Look. HPEC (2022)
Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
Towards Practical Physics-Informed ML Design and Evaluation for Power Grid. CoRR (2022)
Aayushya Agarwal, Carmel Fiscko, Soummya Kar, Larry T. Pileggi, Bruno Sinopoli
ECCO: Equivalent Circuit Controlled Optimization. CoRR (2022)
Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
Circuit-theoretic Line Outage Distribution Factor. CoRR (2022)
Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
A Convex Method of Generalized State Estimation using Circuit-theoretic Node-breaker Model. CoRR (2021)
Priya L. Donti, Aayushya Agarwal, Neeraj Vijay Bedmutha, Larry T. Pileggi, J. Zico Kolter
Adversarially robust learning for security-constrained optimal power flow. NeurIPS (2021)
Timothy McNamara, Amritanshu Pandey, Aayushya Agarwal, Larry T. Pileggi
Two-Stage Homotopy Method to Incorporate Discrete Control Variables into AC-OPF. CoRR (2021)
Priya L. Donti, Aayushya Agarwal, Neeraj Vijay Bedmutha, Larry T. Pileggi, J. Zico Kolter
Adversarially Robust Learning for Security-Constrained Optimal Power Flow. CoRR (2021)
Samuel Pagliarini, Joseph Sweeney, Ken Mai, R. D. Shawn Blanton, Larry T. Pileggi, Subhasish Mitra
Split-Chip Design to Prevent IP Reverse Engineering. IEEE Des. Test 38 (4) (2021)
Marko Jereminov, Larry T. Pileggi
Equivalent Circuit Programming for Power Flow Analysis and Optimization. CoRR (2021)
Naeem Turner-Bandele, Amritanshu Pandey, Larry T. Pileggi
A Risk-Managed Steady-State Analysis to Assess The Impact of Power Grid Uncertainties. CoRR (2021)
Prashanth Mohan, Oguz Atli, Joseph Sweeney, Onur O. Kibar, Larry T. Pileggi, Ken Mai
Hardware Redaction via Designer-Directed Fine-Grained eFPGA Insertion. DATE (2021)
Prashanth Mohan, Oguz Atli, Onur O. Kibar, V. Mohammed Zackriya, Larry T. Pileggi, Ken Mai
Top-down Physical Design of Soft Embedded FPGA Fabrics. FPGA (2021)
Amritanshu Pandey, Aayushya Agarwal, Larry T. Pileggi
Incremental Model Building Homotopy Approach for Solving Exact AC-Constrained Optimal Power Flow. HICSS (2021)
Aayushya Agarwal, Amritanshu Pandey, Larry T. Pileggi
Fast AC Steady-State Power Grid Simulation and Optimization Using Prior Knowledge. CoRR (2021)
Naeem Turner-Bandele, Amritanshu Pandey, Larry T. Pileggi
Analytical Inverter-Based Distributed Generator Model for Power Flow Analysis. CoRR (2021)
Amritanshu Pandey, Larry T. Pileggi
Steady-State Simulation for Combined Transmission and Distribution Systems. IEEE Trans. Smart Grid 11 (2) (2020)
Shimiao Li, Amritanshu Pandey, Bryan Hooi, Christos Faloutsos, Larry T. Pileggi
Dynamic Graph-Based Anomaly Detection in the Electrical Grid. CoRR (2020)
Marko Jereminov, David M. Bromberg, Amritanshu Pandey, Martin R. Wagner, Larry T. Pileggi
Evaluating Feasibility Within Power Flow. IEEE Trans. Smart Grid 11 (4) (2020)
Shimiao Li, Amritanshu Pandey, Larry T. Pileggi
A WLAV-based Robust Hybrid State Estimation using Circuit-theoretic Approach. CoRR (2020)
Amritanshu Pandey, Aayushya Agarwal, Larry T. Pileggi
Incremental Model Building Homotopy Approach for Solving Exact AC-Constrained Optimal Power Flow. CoRR (2020)
Shimiao Li, Amritanshu Pandey, Soummya Kar, Larry T. Pileggi
A Circuit-Theoretic Approach to State Estimation. ISGT-Europe (2020)
Amritanshu Pandey, Aayushya Agarwal, Marko Jereminov, Martin R. Wagner, David M. Bromberg, Larry T. Pileggi
Robust Sequential Steady-State Analysis of Cascading Outages. ISGT Europe (2019)
Amritanshu Pandey, Larry T. Pileggi
Steady-State Simulation for Combined Transmission and Distribution Systems. CoRR (2019)
Fazle Sadi, Joe Sweeney, Tze Meng Low, James C. Hoe, Larry T. Pileggi, Franz Franchetti
Efficient SpMV Operation for Large and Highly Sparse Matrices using Scalable Multi-way Merge Parallelization. MICRO (2019)
Shimiao Li, Amritanshu Pandey, Aayushya Agarwal, Marko Jereminov, Larry T. Pileggi
A LASSO-Inspired Approach for Localizing Power System Infeasibility. CoRR (2019)
Aleksandar Jovicic, Marko Jereminov, Larry T. Pileggi, Gabriela Hug
A Linear Formulation for Power System State Estimation including RTU and PMU Measurements. ISGT Europe (2019)
Shimiao Li, Amritanshu Pandey, Soummya Kar, Larry T. Pileggi
A Circuit-Theoretic Approach to State Estimation. CoRR (2019)
Aayushya Agarwal, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi
Implicitly Modeling Frequency Control within Power Flow. CoRR (2019)
Aayushya Agarwal, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi
Implicitly Modeling Frequency Control within Power Flow. ISGT Europe (2019)
Amritanshu Pandey, Aayushya Agarwal, Marko Jereminov, Larry T. Pileggi
Robust Online Simulation Framework for Grid Restoration Under Loss of SCADA. CoRR (2019)
Bryan Hooi, Hyun Ah Song, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi, Christos Faloutsos
StreamCast: Fast and Online Mining of Power Grid Time Sequences. SDM (2018)
Amritanshu Pandey, Marko Jereminov, Martin R. Wagner, David M. Bromberg, Gabriela Hug, Larry T. Pileggi
Robust Steady State Analysis of the Power Grid. CoRR (2018)
Bryan Hooi, Leman Akoglu, Dhivya Eswaran, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi, Christos Faloutsos
ChangeDAR: Online Localized Change Detection for Sensor Data on a Graph. CIKM (2018)
Martin R. Wagner, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi
Robust Probabilistic Analysis of Transmission Power Systems based on Equivalent Circuit Formulation. CoRR (2018)
Shaolong Liu, Jeyanandh Paramesh, Larry T. Pileggi, Taimur Gibran Rabuske, Jorge Fernandcs
A 125 MS/s 10.4 ENOB 10.1 fJ/Conv-Step Multi-Comparator SAR ADC with Comparator Noise Scaling in 65nm CMOS. ESSCIRC (2018)
Bryan Hooi, Dhivya Eswaran, Hyun Ah Song, Amritanshu Pandey, Marko Jereminov, Larry T. Pileggi, Christos Faloutsos
GridWatch: Sensor Placement and Anomaly Detection in the Electrical Grid. ECML/PKDD (1) (2018)
Fazle Sadi, Joe Sweeney, Scott McMillan, Tze Meng Low, James C. Hoe, Larry T. Pileggi, Franz Franchetti
PageRank Acceleration for Large Graphs with Scalable Hardware and Two-Step SpMV. HPEC (2018)
Fazle Sadi, Larry T. Pileggi, Franz Franchetti
Algorithm and hardware co-optimized solution for large SpMV problems. HPEC (2017)
Ameya Patil, Naresh R. Shanbhag, Lav R. Varshney, Eric Pop, H.-S. Philip Wong, Subhasish Mitra, Jan M. Rabaey, Jeffrey A. Weldon, Larry T. Pileggi, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young
A Systems Approach to Computing in Beyond CMOS Fabrics: Invited. DAC (2017)
Marko Jereminov, Amritanshu Pandey, Hyun Ah Song, Bryan Hooi, Christos Faloutsos, Larry T. Pileggi
Linear load model for robust power system analysis. ISGT Europe (2017)
Hyun Ah Song, Bryan Hooi, Marko Jereminov, Amritanshu Pandey, Larry T. Pileggi, Christos Faloutsos
PowerCast: Mining and Forecasting Power Grid Sequences. ECML/PKDD (2) (2017)
Mehmet Meric Isgenc, Samuel Pagliarini, Renzhi Liu, Larry T. Pileggi
Evaluating the benefits of relaxed BEOL pitch for deeply scaled ICs. ISQED (2017)
Amritanshu Pandey, Marko Jereminov, Martin R. Wagner, Gabriela Hug, Larry T. Pileggi
Robust Convergence of Power Flow using Tx Stepping Method with Equivalent Circuit Formulation. CoRR (2017)
Amritanshu Pandey, Marko Jereminov, Xin Li, Gabriela Hug, Larry T. Pileggi
Aggregated Load and Generation Equivalent Circuit Models with Semi-Empirical Data Fitting. CoRR (2017)
Amritanshu Pandey, Marko Jereminov, Gabriela Hug, Larry T. Pileggi
Improving Power Flow Robustness via Circuit Simulation Methods. CoRR (2017)
Fazle Sadi, Larry T. Pileggi, Franz Franchetti
3D DRAM based application specific hardware accelerator for SpMV. HPEC (2016)
Amritanshu Pandey, Marko Jereminov, Xin Li, Gabriela Hug, Larry T. Pileggi
Unified power system analyses and models using equivalent circuit formulation. ISGT (2016)
Marko Jereminov, Amritanshu Pandey, David M. Bromberg, Xin Li, Gabriela Hug, Larry T. Pileggi
Steady-state analysis of power system harmonics using equivalent split-circuit models. ISGT Europe (2016)
Renzhi Liu, Jeffrey A. Weldon, Larry T. Pileggi
Extended statistical element selection: a calibration method for high resolution in analog/RF designs. DAC (2016)
L. Richard Carley, Gurkan Colak, Louis Chomas, Larry T. Pileggi, Kenneth Mai
Technologies for secure RFID authentication of medicinal pills and capsules. RFID-TA (2016)
Fa Wang, Shihui Yin, Minhee Jun, Xin Li, Tamal Mukherjee, Rohit Negi, Larry T. Pileggi
Re-thinking polynomial optimization: Efficient programming of reconfigurable radio frequency (RF) systems by convexification. ASP-DAC (2016)
Vehbi Calayir, Mohamed Darwish, Jeffrey A. Weldon, Larry T. Pileggi
Analog neuromorphic computing enabled by multi-gate programmable resistive devices. DATE (2015)
Renzhi Liu, Larry T. Pileggi
Low-Overhead Self-Healing Methodology for Current Matching in Current-Steering DAC. IEEE Trans. Circuits Syst. II Express Briefs (7) (2015)
Vehbi Calayir, Larry T. Pileggi
Device Requirements and Technology-Driven Architecture Optimization for Analog Neurocomputing. IEEE J. Emerg. Sel. Topics Circuits Syst. 5 (2) (2015)
Qi Guo, Tze Meng Low, Nikolaos Alachiotis, Berkin Akin, Larry T. Pileggi, James C. Hoe, Franz Franchetti
Enabling portable energy efficiency with memory accelerated library. MICRO (2015)
Mohamed M. Sabry, Mingyu Gao, Gage Hills, Chi-Shuen Lee, Greg Pitner, Max M. Shulaker, Tony F. Wu, Mehdi Asheghi, Jeffrey Bokor, Franz Franchetti, Kenneth E. Goodson, Christos Kozyrakis, Igor L. Markov, Kunle Olukotun, Larry T. Pileggi, Eric Pop, Jan M. Rabaey, Christopher Ré, H.-S. Philip Wong, Subhasish Mitra
Energy-Efficient Abundant-Data Computing: The N3XT 1, 000x. Computer 48 (12) (2015)
H. Ekin Sumbul, Kaushik Vaidyanathan, Qiuling Zhu, Franz Franchetti, Larry T. Pileggi
A synthesis methodology for application-specific logic-in-memory designs. DAC (2015)
Kaushik Vaidyanathan, Renzhi Liu, H. Ekin Sumbul, Qiuling Zhu, Franz Franchetti, Larry T. Pileggi
Efficient and secure intellectual property (IP) design with split fabrication. HOST (2014)
Renzhi Liu, Larry T. Pileggi, Jeffrey A. Weldon
A wideband RF receiver with >80 dB harmonic rejection ratio. CICC (2014)
Kaushik Vaidyanathan, Bishnu P. Das, Larry T. Pileggi
Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack. DAC (2014)
Kaushik Vaidyanathan, Bishnu P. Das, H. Ekin Sumbul, Renzhi Liu, Larry T. Pileggi
Building trusted ICs using split fabrication. HOST (2014)
Fazle Sadi, Berkin Akin, Doru-Thom Popovici, James C. Hoe, Larry T. Pileggi, Franz Franchetti
Algorithm/hardware co-optimized SAR image reconstruction with 3D-stacked logic in memory. HPEC (2014)
Kaushik Vaidyanathan, Lars Liebmann, Andrzej J. Strojwas, Larry T. Pileggi
Sub-20 nm design technology co-optimization for standard cell logic. ICCAD (2014)
Minhee Jun, Rohit Negi, Ying-Chih Wang, Tamal Mukherjee, Xin Li, Jun Tao, Larry T. Pileggi
Joint invariant estimation of RF impairments for reconfigurable Radio Frequency(RF) front-end. GLOBECOM Workshops (2014)
V. H.-C. Chen, Larry T. Pileggi
22.2 A 69.5mW 20GS/s 6b time-interleaved ADC with embedded time-to-digital calibration in 32nm CMOS SOI. ISSCC (2014)
Qiuling Zhu, Berkin Akin, H. Ekin Sumbul, Fazle Sadi, James C. Hoe, Larry T. Pileggi, Franz Franchetti
A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing. 3DIC (2013)
Qiuling Zhu, Christian R. Berger, Eric L. Turner, Larry T. Pileggi, Franz Franchetti
Local Interpolation-based Polar Format SAR: Algorithm, Hardware Implementation and Design Automation. J. Signal Process. Syst. 71 (3) (2013)
Vehbi Calayir, Larry T. Pileggi
All-magnetic analog associative memory. NEWCAS (2013)
Qiuling Zhu, Tobias Graf, H. Ekin Sumbul, Larry T. Pileggi, Franz Franchetti
Accelerating sparse matrix-matrix multiplication with 3D-stacked logic-in-memory hardware. HPEC (2013)
Jean-Olivier Plouchart, Mark A. Ferriss, A. S. Natarajan, Alberto Valdes-Garcia, Bodhisatwa Sadhu, Alexander V. Rylyakov, Benjamin D. Parker, Michael P. Beakes, Aydin Babakhani, Soner Yaldiz, Larry T. Pileggi, Ramesh Harjani, Scott K. Reynolds, José A. Tierno, Daniel J. Friedman
A 23.5 GHz PLL With an Adaptively Biased VCO in 32 nm SOI-CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2013)
Matthias Althoff, Akshay Rajhans, Bruce H. Krogh, Soner Yaldiz, Xin Li, Larry T. Pileggi
Formal verification of phase-locked loops using reachability analysis and continuization. Commun. ACM 56 (10) (2013)
Vehbi Calayir, Larry T. Pileggi
Fully-digital oscillatory associative memories enabled by non-volatile logic. IJCNN (2013)
Vehbi Calayir, Tom Jackson, Augusto Tazzoli, Gianluca Piazza, Larry T. Pileggi
Neurocomputing and associative memories based on ovenized aluminum nitride resonators. IJCNN (2013)
Qiuling Zhu, Larry T. Pileggi, Franz Franchetti
A Smart Memory Accelerated Computed Tomography Parallel Backprojection. VLSI-SoC (Selected Papers) (2012)
Qiuling Zhu, Kaushik Vaidyanathan, Ofer Shacham, Mark Horowitz, Larry T. Pileggi, Franz Franchetti
Design Automation Framework for Application-Specific Logic-in-Memory Blocks. ASAP (2012)
Daniel Morris, David M. Bromberg, Jian-Gang Jimmy Zhu, Larry T. Pileggi
mLogic: ultra-low voltage non-volatile logic circuits using STT-MTJ devices. DAC (2012)
Qiuling Zhu, Larry T. Pileggi, Franz Franchetti
Cost-effective smart memory implementation for parallel backprojection in computed tomography. VLSI-SoC (2012)
Qiuling Zhu, Christian R. Berger, Eric L. Turner, Larry T. Pileggi, Franz Franchetti
Polar format synthetic aperture radar in energy efficient application-specific logic-in-memory. ICASSP (2012)
Cheng-Yuan Wen, Jeyanandh Paramesh, Larry T. Pileggi, Jing Li, SangBum Kim, Jonathan E. Proesel, Chung Lam
Post-silicon calibration of analog CMOS using phase-change memory cells. ESSCIRC (2011)
Matthias Althoff, Soner Yaldiz, Akshay Rajhans, Xin Li, Bruce H. Krogh, Larry T. Pileggi
Formal verification of phase-locked loops using reachability analysis and continuization. ICCAD (2011)
Tejas Jhaveri, Vyacheslav Rovner, Lars Liebmann, Larry T. Pileggi, Andrzej J. Strojwas, Jason Hibbeler
Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (4) (2010)
Gokce Keskin, Jonathan E. Proesel, Larry T. Pileggi
Statistical modeling and post manufacturing configuration for scaled analog CMOS. CICC (2010)
Soner Yaldiz, Umut Arslan, Xin Li, Larry T. Pileggi
Efficient statistical analysis of read timing failures in SRAM circuits. ISQED (2009)
Jason G. Brown, Brian Taylor, Ronald D. Blanton, Larry T. Pileggi
Automated Testability Enhancements for Logic Brick Libraries. DATE (2008)
Larry T. Pileggi, Gökçe Keskin, Xin Li, Ken Mai, Jonathan E. Proesel
Mismatch analysis and statistical design at 65 nm and below. CICC (2008)
Brian Taylor, Larry T. Pileggi
Exact Combinatorial Optimization Methods for Physical Design of Regular Logic Bricks. DAC (2007)
Sounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi
Specification Test Compaction for Analog Circuits and MEMS CoRR (2007)
Sounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi
Specification Test Compaction for Analog Circuits and MEMS. DATE (2005)
Radu Marculescu, Diana Marculescu, Larry T. Pileggi
Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems. ICCD (2004)