Jeyanandh Paramesh

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 31

Top Topics

Statistical Learning

Fully Connected

Millimeter Wave

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Xiaoliang Li, Vincent P. J. Chung, Metin G. Guney, Tamal Mukherjee, Gary K. Fedder, Jeyanandh Paramesh
A 46.6 μg/√Hz Single-Chip Accelerometer Exploiting a DTC-Assisted Chopper Amplifier. IEEE J. Solid State Circuits 59 (2) (2024)
Chao Rong, Jeyanandh Paramesh, L. Richard Carley
An Efficient Meta-Reinforcement Learning Approach for Circuit Linearity Calibration via Style Injection. MWSCAS (2023)
Mohammad Ghaedi Bardeh, Navid Naseh, Jierui Fu, Jeyanandh Paramesh, Kamran Entesari
A mm-wave RC PPF Quadrature Network with Gain Boosting in 22nm CMOS FDSOI. RWS (2023)
Susnata Mondal, Larry Richard Carley, Jeyanandh Paramesh
Dual-Band, Two-Layer Millimeter-Wave Transceiver for Hybrid MIMO Systems. IEEE J. Solid State Circuits 57 (2) (2022)
Chao Rong, Jeyanandh Paramesh, L. Richard Carley
A Deep Reinforcement Learning Framework for High-Dimensional Circuit Linearization. IEEE Trans. Circuits Syst. II Express Briefs 69 (9) (2022)
Susnata Mondal, Jeyanandh Paramesh
Power-Efficient Design Techniques for mm-Wave Hybrid/Digital FDD/Full-Duplex MIMO Transceivers. IEEE J. Solid State Circuits 55 (8) (2020)
Gary K. Fedder, Vincent P. J. Chung, Metin G. Guney, Xiaoliang Li, Yi Chung Lin, Suresh Santhanam, Jeyanandh Paramesh, Tamal Mukherjee
High-g Capacitive Accelerometer Arrays with Low Bias Instability. PLANS (2020)
Vaibhav Singh, Susnata Mondal, Akshay Gadre, Milind Srivastava, Jeyanandh Paramesh, Swarun Kumar
Millimeter-wave full duplex radios. MobiCom (2020)
Susnata Mondal, L. Richard Carley, Jeyanandh Paramesh
4.4 A 28/37GHz Scalable, Reconfigurable Multi-Layer Hybrid/Digital MIMO Transceiver for TDD/FDD and Full-Duplex Communication. ISSCC (2020)
Xiaoliang Li, Vincent P. J. Chung, Metin G. Guney, Tamal Mukherjee, Gary K. Fedder, Jeyanandh Paramesh
A Reconfigurable High-Bandwidth CMOS-MEMS Capacitive Accelerometer Array with High-g Measurement Capability and Low Bias Instability. VLSI Circuits (2020)
Susnata Mondal, Rahul Singh, Jeyanandh Paramesh
A Reconfigurable Bidirectional 28/37/39GHz Front-End Supporting MIMO-TDD, Carrier Aggregation TDD and FDD/Full-Duplex with Self-Interference Cancellation in Digital and Fully Connected Hybrid Beamformers. ISSCC (2019)
Xiaoliang Li, Vincent P. J. Chung, Metin G. Guney, Tamal Mukherjee, Gary K. Fedder, Jeyanandh Paramesh
A High Dynamic Range CMOS-MEMS Accelerometer Array with Drift Compensation and Fine-Grain Offset Compensation. CICC (2019)
Mazen Soliman, Abhay Kochhar, Hoda Abdelsalam, Flavius V. Pop, Gabriel Vidal-Álvarez, Jeffrey Weldon, Gianluca Piazza, Jeyanandh Paramesh
An 18 nW -47/-40 dBm Sensitivity 3/100 kbps MEMS-Assisted CMOS Wake-Up Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2019)
Susnata Mondal, Jeyanandh Paramesh
A Reconfigurable 28-/37-GHz MMSE-Adaptive Hybrid-Beamforming Receiver for Carrier Aggregation and Multi-Standard MIMO Communication. IEEE J. Solid State Circuits 54 (5) (2019)
Erkan Alpman, Ahmad Khairi, Richard Dorrance, Minyoung Park, V. Srinivasa Somayazulu, Jeffrey R. Foerster, Ashoke Ravi, Jeyanandh Paramesh, Stefano Pellerano
802.11g/n Compliant Fully Integrated Wake-Up Receiver With -72-dBm Sensitivity in 14-nm FinFET CMOS. IEEE J. Solid State Circuits 53 (5) (2018)
Susnata Mondal, Rahul Singh, Jeyanandh Paramesh
A reconfigurable 28/37GHz hybrid-beamforming MIMO receiver with inter-band carrier aggregation and RF-domain LMS weight adaptation. ISSCC (2018)
Susnata Mondal, Rahul Singh, Ahmed I. Hussein, Jeyanandh Paramesh
A 25-30 GHz Fully-Connected Hybrid Beamforming Receiver for MIMO Communication. IEEE J. Solid State Circuits 53 (5) (2018)
Shaolong Liu, Taimur Gibran Rabuske, Jeyanandh Paramesh, Lawrence T. Pileggi, Jorge R. Fernandes
Analysis and Background Self-Calibration of Comparator Offset in Loop-Unrolled SAR ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2018)
Ahmed I. Hussein, Sriharsha Vasadi, Jeyanandh Paramesh
A 450 fs 65-nm CMOS Millimeter-Wave Time-to-Digital Converter Using Statistical Element Selection for All-Digital PLLs. IEEE J. Solid State Circuits 53 (2) (2018)
Shaolong Liu, Jeyanandh Paramesh, Larry T. Pileggi, Taimur Gibran Rabuske, Jorge Fernandcs
A 125 MS/s 10.4 ENOB 10.1 fJ/Conv-Step Multi-Comparator SAR ADC with Comparator Noise Scaling in 65nm CMOS. ESSCIRC (2018)
Ahmed I. Hussein, Jeyanandh Paramesh
Design and Self-Calibration Techniques for Inductor-Less Millimeter-Wave Frequency Dividers. IEEE J. Solid State Circuits 52 (6) (2017)
Sandipan Kundu, Subhanshu Gupta, David J. Allstot, Jeyanandh Paramesh
Frequency-Channelized Mismatch-Shaped Quadrature Data Converters for Carrier Aggregation in MU-MIMO LTE-A. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2017)
Mazen Soliman, Shih-Chang Hung, Jeyanandh Paramesh
A four-antenna baseband multipath emulator for millimeter-wave channels. ISCAS (2017)
Ahmed I. Hussein, Sriharsha Vasadi, Mazen Soliman, Jeyanandh Paramesh
19.3 A 50-to-66GHz 65nm CMOS all-digital fractional-N PLL with 220fsrms jitter. ISSCC (2017)
Ahmed I. Hussein, Sriharsha Vasadi, Jeyanandh Paramesh
A 50-66-GHz Phase-Domain Digital Frequency Synthesizer With Low Phase Noise and Low Fractional Spurs. IEEE J. Solid State Circuits 52 (12) (2017)
Ahmed I. Hussein, Sandipan Kundu, Jeyanandh Paramesh
Adaptive Beamforming Assisted Decision Feedback Equalization for Millimeter Wave Receivers. GLOBECOM (2015)
Sandipan Kundu, Erkan Alpman, Julia Hsin-Lin Lu, Hasnain Lakdawala, Jeyanandh Paramesh, Byunghoo Jung, Sarit Zur, Eshel Gordon
A 1.2 V 2.64 GS/s 8 bit 39 mW Skew-Tolerant Time-interleaved SAR ADC in 40 nm Digital LP CMOS for 60 GHz WLAN. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2015)
Ronald D. Blanton, Xin Li, Ken Mai, Diana Marculescu, Radu Marculescu, Jeyanandh Paramesh, Jeff G. Schneider, Donald E. Thomas
Statistical Learning in Chip (SLIC). ICCAD (2015)
Sandipan Kundu, Subhanshu Gupta, David J. Allstot, Jeyanandh Paramesh
DAC mismatch shaping for quadrature sigma-delta data converters. MWSCAS (2015)
Sandipan Kundu, Jeyanandh Paramesh
A Compact, Supply-Voltage Scalable 45-66 GHz Baseband-Combining CMOS Phased-Array Receiver. IEEE J. Solid State Circuits 50 (2) (2015)
Ahmed I. Hussein, Shadi Saberi, Jeyanandh Paramesh
A 10 mW 60GHz 65nm CMOS DCO with 24% tuning range and 40 kHz frequency granularity. CICC (2015)
Ronald D. Blanton, Xin Li, Ken Mai, Diana Marculescu, Radu Marculescu, Jeyanandh Paramesh, Jeff G. Schneider, Donald E. Thomas
SLIC: Statistical learning in chip. ISIC (2014)
Sandipan Kundu, Julia Hsin-Lin Lu, Erkan Alpman, Hasnain Lakdawala, Jeyanandh Paramesh, Byunghoo Jung, Sarit Zur, Eshel Gordon
A 1.2 V 2.64 GS/s 8bit 39 mW skew-tolerant time-interleaved SAR ADC in 40 nm digital LP CMOS for 60 GHz WLAN. CICC (2014)
James Downey, Jeyanandh Paramesh, Daniel D. Stancil, Tamal Mukherjee
A stepped-frequency continuous wave ranger for aiding pedestrian navigation. WiSNet (2013)
Ahmad Khairi, Chenyang Wu, Yoed Rabin, Gary K. Fedder, Jeyanandh Paramesh, David Schwartzman
Ultra-low power frequency and duty-cycle modulated implantable pressure-temperature sensor. BioCAS (2013)
Jeyanandh Paramesh, Sandipan Kundu, Shadi Saberi
Low-power front-end amplification and frequency generation techniques for ultra-wideband millimeter-wave transceivers. MWSCAS (2012)
Sandipan Kundu, Ahmad Khairi, Jeyanandh Paramesh
A supply-voltage scalable, 45 nm CMOS ultra-wideband receiver for mm-wave ranging and communication. CICC (2012)
Subhanshu Gupta, Yi Tang, Jeyanandh Paramesh, David J. Allstot
Multi-rate Polyphase DSP and LMS Calibration Schemes for Oversampled ADCs. J. Signal Process. Syst. 69 (3) (2012)
Cheng-Yuan Wen, Jeyanandh Paramesh, Larry T. Pileggi, Jing Li, SangBum Kim, Jonathan E. Proesel, Chung Lam
Post-silicon calibration of analog CMOS using phase-change memory cells. ESSCIRC (2011)
Subhanshu Gupta, Yi Tang, Kuang-Wei Cheng, Jeyanandh Paramesh, David J. Allstot
Multi-rate polyphase DSP and LMS calibration schemes for oversampled data conversion systems. ICASSP (2011)
Dicle Ozis, Jeyanandh Paramesh, David J. Allstot
Integrated Quadrature Couplers and Their Application in Image-Reject Receivers. IEEE J. Solid State Circuits 44 (5) (2009)
Yi Tang, Kuang-Wei Cheng, Subhanshu Gupta, Jeyanandh Paramesh, David J. Allstot
Cascaded Complex ADCs With Adaptive Digital Calibration for I/Q Mismatch. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2008)
Subhanshu Gupta, Yi Tang, David J. Allstot, Jeyanandh Paramesh
Hybrid modeling techniques for low OSR cascade continuous-time SigmaDelta modulators. ISCAS (2008)
Yi Tang, Subhanshu Gupta, Jeyanandh Paramesh, David J. Allstot
A Digital-Summing Feedforward Sigma-Delta Modulator and its Application to a Cascade ADC. ISCAS (2007)
Dicle Ozis, Jeyanandh Paramesh, David J. Allstot
Analysis and design of lumped-element quadrature couplers with lossy passive elements. ISCAS (2006)
Jeyanandh Paramesh, David J. Allstot
Analysis of the Bridged T-Coil Circuit Using the Extra-Element Theorem. IEEE Trans. Circuits Syst. II Express Briefs (12) (2006)
Mostafa Elmala, Jeyanandh Paramesh, Krishnamurthy Soumyanath
A 90-nm CMOS Doherty power amplifier with minimum AM-PM distortion. IEEE J. Solid State Circuits 41 (6) (2006)
Jeyanandh Paramesh, Ralph Bishop, Krishnamurthy Soumyanath, David J. Allstot
A four-antenna receiver in 90-nm CMOS for beamforming and spatial diversity. IEEE J. Solid State Circuits 40 (12) (2005)
Jeyanandh Paramesh, Annette R. von Jouanne
Use of sigma-delta modulation to control EMI from switch-mode power supplies. IEEE Trans. Ind. Electron. 48 (1) (2001)