19.3 A 50-to-66GHz 65nm CMOS all-digital fractional-N PLL with 220fsrms jitter.

Ahmed I. Hussein Sriharsha Vasadi Mazen Soliman Jeyanandh Paramesh

Published in: ISSCC (2017)

Keyphrases

metal oxide semiconductor
high speed
circuit design
power consumption
cmos technology
low cost
mixed signal
cmos image sensor
low power
integrated circuit
silicon on insulator
frequency band
image sensor
power supply
clock frequency
vlsi circuits
image processing algorithms
fractional order
neural network