Donald E. Thomas

Publication Activity (10 Years)

Years Active: 1977-2017
Publications (10 Years): 3

Top Topics

Discrete Cosine Transform

Statistical Learning

Top Venues

ACM Trans. Design Autom. Electr. Syst.

Publications

Xiang Lin, R. D. (Shawn) Blanton, Donald E. Thomas
Random Forest Architectures on FPGA for Multiple Applications. ACM Great Lakes Symposium on VLSI (2017)
Donald E. Thomas
Keynote speaker moving digital system design courses into the modern era, again. MSE (2015)
Ronald D. Blanton, Xin Li, Ken Mai, Diana Marculescu, Radu Marculescu, Jeyanandh Paramesh, Jeff G. Schneider, Donald E. Thomas
Statistical Learning in Chip (SLIC). ICCAD (2015)
Ronald D. Blanton, Xin Li, Ken Mai, Diana Marculescu, Radu Marculescu, Jeyanandh Paramesh, Jeff G. Schneider, Donald E. Thomas
SLIC: Statistical learning in chip. ISIC (2014)
Brett H. Meyer, Adam S. Hartman, Donald E. Thomas
Cost-effective lifetime and yield optimization for NoC-based MPSoCs. ACM Trans. Design Autom. Electr. Syst. 19 (2) (2014)
Xin Li, Ronald Shawn Blanton, Pulkit Grover, Donald E. Thomas
Ultra-low-power biomedical circuit design and optimization: Catching the don't cares. ISIC (2014)
Minho Won, Hassan Albalawi, Xin Li, Donald E. Thomas
Low-power hardware implementation of movement decoding for brain computer interface with reduced-resolution discrete cosine transform. EMBC (2014)
Adam S. Hartman, Donald E. Thomas
Lifetime improvement through runtime wear-based task mapping. CODES+ISSS (2012)
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
Stochastic Contention Level Simulation for Single-Chip Heterogeneous Multiprocessors. IEEE Trans. Computers 59 (10) (2010)
Brett H. Meyer, Adam S. Hartman, Donald E. Thomas
Cost-effective slack allocation for lifetime improvement in NoC-based MPSoCs. DATE (2010)
Brett H. Meyer, Adam S. Hartman, Donald E. Thomas
Slack allocation for yield improvement in NoC-based MPSoCs. ISQED (2010)
Adam S. Hartman, Donald E. Thomas, Brett H. Meyer
A case for lifetime-aware task mapping in embedded chip multiprocessors. CODES+ISSS (2010)
Brett H. Meyer, Donald E. Thomas
Rethinking the synthesis of buses, data mapping, and memory allocation for MPSoC. Des. Autom. Embed. Syst. 13 (1-2) (2009)
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
Shared Resource Access Attributes for High-Level Contention Models. DAC (2007)
Brett H. Meyer, Donald E. Thomas
Rethinking Automated Synthesis of MPSoC Architectures. IPDPS (2007)
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
Event-based re-training of statistical contention models for heterogeneous multiprocessors. CODES+ISSS (2007)
Brett H. Meyer, Donald E. Thomas
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC. CODES+ISSS (2007)
JoAnn M. Paul, Donald E. Thomas, Alex Bobrek
Scenario-oriented design for single-chip heterogeneous multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. 14 (8) (2006)
Philip Koopman, Howie Choset, Rajeev Gandhi, Bruce H. Krogh, Diana Marculescu, Priya Narasimhan, JoAnn M. Paul, Ragunathan Rajkumar, Daniel P. Siewiorek, Asim Smailagic, Peter Steenkiste, Donald E. Thomas, Chenxi Wang
Undergraduate embedded system education at Carnegie Mellon. ACM Trans. Embed. Comput. Syst. 4 (3) (2005)
JoAnn M. Paul, Donald E. Thomas, Andrew S. Cassidy
High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors. ACM Trans. Design Autom. Electr. Syst. 10 (3) (2005)
JoAnn M. Paul, Donald E. Thomas, Alex Bobrek
Benchmark-based design strategies for single chip heterogeneous multiprocessors. CODES+ISSS (2004)
Alex Bobrek, Joshua J. Pieper, Jeffrey E. Nelson, JoAnn M. Paul, Donald E. Thomas
Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach. DATE (2004)
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Donald E. Thomas, Faraydon Karim
High level cache simulation for heterogeneous multiprocessors. DAC (2004)
JoAnn M. Paul, Alex Bobrek, Jeffrey E. Nelson, Joshua J. Pieper, Donald E. Thomas
Schedulers as model-based design elements in programmable heterogeneous multiprocessors. DAC (2003)
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas
Layered, Multi-Threaded, High-Level Performance Design. DATE (2003)
JoAnn M. Paul, Christopher M. Eatedali, Donald E. Thomas
The design context of concurrent computation systems. CODES (2002)
Andrew S. Cassidy, Christopher P. Andrews, Donald E. Thomas, JoAnn M. Paul
System-Level Modeling of a Network Switch SoC. ISSS (2002)
JoAnn M. Paul, Arne J. Suppé, Henele I. Adams, Donald E. Thomas
Multi-Level Modeling of Software on Hardware in Concurrent Computation. IPDPS (2002)
JoAnn M. Paul, Donald E. Thomas
A Layered, Codesign Virtual Machine Approach to Modeling Computer Systems. DATE (2002)
Sandra J. Weber, JoAnn M. Paul, Donald E. Thomas
Co-RAM: combinational logic synthesis applied to software partitions for mapping to a novel memory device. IEEE Trans. Very Large Scale Integr. Syst. 9 (6) (2001)
JoAnn M. Paul, Arne J. Suppé, Donald E. Thomas
Modeling and simulation of steady state and transient behaviors for emergent SoCs. ISSS (2001)
Neal K. Tibrewala, JoAnn M. Paul, Donald E. Thomas
Modeling and evaluation of hardware/software designs. CODES (2001)
Sari L. Coumeri, Donald E. Thomas
Memory modeling for system synthesis. IEEE Trans. Very Large Scale Integr. Syst. 8 (3) (2000)
JoAnn M. Paul, Simon N. Peffers, Donald E. Thomas
Frequency interleaving as a codesign scheduling paradigm. CODES (2000)
William E. Dougherty, Donald E. Thomas
Unifying behavioral synthesis and physical design. DAC (2000)
JoAnn M. Paul, Simon N. Peffers, Donald E. Thomas
A codesign virtual machine for hierarchical, balanced hardware/software system modeling. DAC (2000)
Christopher Inacio, Herman Schmit, David Nagle, Andrew Ryan, Donald E. Thomas, Yingfai Tong, Ben Klass
Vertical Benchmarks for CAD. DAC (1999)
William E. Dougherty, David J. Pursley, Donald E. Thomas
Subsetting Behavioral Intellectual Property for Low Power ASIP Design. J. VLSI Signal Process. 21 (3) (1999)
Donald E. Thomas, JoAnn M. Paul, Simon N. Peffers, Sandra J. Weber
Peer-based multithreaded executable co-specification. CODES (1999)
William E. Dougherty, Donald E. Thomas
Modeling and automating selection of guarding techniques for datapath elements. ISLPED (1999)
Sari L. Coumeri, Donald E. Thomas
An Environment for Exploring Low Power Memory Configurations in System Level Design. ICCD (1999)
Sari L. Coumeri, Donald E. Thomas
Memory modeling for system synthesis. ISLPED (1998)
Srihari Cadambi, Jeffrey Weener, Seth Copen Goldstein, Herman Schmit, Donald E. Thomas
Managing Pipeline-Reconfigurable FPGAs. FPGA (1998)
Herman Schmit, Donald E. Thomas
Address generation for memories containing multiple arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (5) (1998)
Herman Schmit, Donald E. Thomas
Synthesis of application-specific memory designs. IEEE Trans. Very Large Scale Integr. Syst. 5 (1) (1997)
Jay K. Adams, Donald E. Thomas
The Design of Mixed Hardware/Software Systems. DAC (1996)
Prashant Sawkar, Donald E. Thomas
Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs. DAC (1995)
Jay K. Adams, Donald E. Thomas
Multiple-process behavioral synthesis for mixed hardware-software systems. ISSS (1995)
Herman Schmit, Donald E. Thomas
Address generation for memories containing multiple arrays. ICCAD (1995)
Herman Schmit, Donald E. Thomas
Array mapping in behavioral synthesis. ISSS (1995)
Herman Schmit, Donald E. Thomas
Hidden Markov modeling and fuzzy controllers in FPGAs. FCCM (1995)
Jay K. Adams, John Alan Miller, Donald E. Thomas
Execution-time profiling for multiple-process behavioral synthesis. ICCD (1995)
Lawrence F. Arnstein, Donald E. Thomas
The Attributed-Behavior Abstraction and Synthesis Tools. DAC (1994)
Lawrence F. Arnstein, Donald E. Thomas
Applications of attributed-behavior synthesis. HLSS (1994)
R. S. Ramchandani, Donald E. Thomas
Behavioral-Test Generation using Mixed-Integer Non-linear Programming. ITC (1994)
D. L. Springer, Donald E. Thomas
Exploiting the special structure of conflict and compatibility graphs in high-level synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (7) (1994)
Prashant Sawkar, Donald E. Thomas
Performance Directed Technology Mapping for Look-Up Table Based FPGAs. DAC (1993)
Lawrence F. Arnstein, Donald E. Thomas
A general consistency technique for increasing the controllability of high level synthesis tools. ICCAD (1993)
Donald E. Thomas, Jay K. Adams, Herman Schmit
A Model and Methodology for Hardware-Software Codesign. IEEE Des. Test Comput. 10 (3) (1993)
Richard J. Cloutier, Donald E. Thomas
Synthesis of Pipelined Instruction Set Processors. DAC (1993)
Prashant Sawkar, Donald E. Thomas
Area and Delay Mapping for Table-Look-Up Based Field Programmable Gate Arrays. DAC (1992)
Jay K. Adams, Donald E. Thomas
Addressing the Tradeoff Between Standard and Custom ICs in System Level Design. ICCD (1992)
Elizabeth D. Lagnese, Donald E. Thomas
Architectural partitioning for system level synthesis of integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (7) (1991)
Richard J. Cloutier, Donald E. Thomas
The Combination of Scheduling, Allocation, and Mapping in a Single Algorithm. DAC (1990)
D. L. Springer, Donald E. Thomas
Exploiting the Special Structure of Conflict and Compatibility Graphs in High-Level Synthesis. ICCAD (1990)
Elizabeth D. Lagnese, Donald E. Thomas
Architectural Partitioning for System Level Design. DAC (1989)
Robert A. Walker, Donald E. Thomas
Behavioral transformation for algorithmic level IC design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (10) (1989)
Donald E. Thomas, Elizabeth M. Dirkes, Robert A. Walker, Jayanth V. Rajan, John A. Nestor, Robert L. Blackburn
The System Architect's Workbench. DAC (1988)
Robert L. Blackburn, Donald E. Thomas, Patti M. Koenig
CORAL II: Linking Behavior and Structure in an IC Design System. DAC (1988)
Donald E. Thomas, Robert L. Blackburn, Jayanth V. Rajan
Linking the Behavioral and Structural Domains of Representation for Digital System Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6 (1) (1987)
Jayanth V. Rajan, Donald E. Thomas
Synthesis by delayed binding of decisions. DAC (1985)
Thaddeus J. Kowalski, Donald E. Thomas
The VLSI design automation assistant: what's in a knowledge base. DAC (1985)
Robert A. Walker, Donald E. Thomas
A model of design representation and synthesis. DAC (1985)
Donald E. Thomas
Observations on comparing digital systems synthesis techniques. ACM Conference on Computer Science (1985)
Robert L. Blackburn, Donald E. Thomas
Linking the behavioral and structural dominis of representation in a synthesis system. DAC (1985)
Richard M. Sedmak, Donald E. Thomas
Probing the State of the Art. IEEE Des. Test 1 (3) (1984)
Thaddeus J. Kowalski, Donald E. Thomas
The VLSI Design Automation Assistant: An IBM System/370 Design. IEEE Des. Test 1 (1) (1984)
Donald E. Thomas, John A. Nestor
Defining and Implementing a Multilevel Design Representation with Simulation Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2 (3) (1983)
Donald E. Thomas, Charles Y. Hitchcock III, Thaddeus J. Kowalski, Jayanth V. Rajan, Robert A. Walker
Automatic Data Path Synthesis. Computer 16 (12) (1983)
Robert A. Walker, Donald E. Thomas
Behavioral level transformation in the CMU-DA system. DAC (1983)
Charles Y. Hitchcock III, Donald E. Thomas
A method of automatic data path synthesis. DAC (1983)
Donald E. Thomas, Gary W. Leive
Automating Technology Relative Logic Synthesis and Module Selection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2 (2) (1983)
Thaddeus J. Kowalski, Donald E. Thomas
The VLSI Design Automation Assistant: Prototype system. DAC (1983)
John A. Nestor, Donald E. Thomas
Defining and implementing a multilevel design representation with simulation applications. DAC (1982)
Gary W. Leive, Donald E. Thomas
A technology relative Logic Synthesis and Module Selection system. DAC (1981)
Donald E. Thomas, Daniel P. Siewiorek
Measuring Designer Performance to Verify Design Automation Systems. IEEE Trans. Computers 30 (1) (1981)
Alice C. Parker, Donald E. Thomas, Daniel P. Siewiorek, Mario Barbacci, Louis J. Hafer, Gary W. Leive, Jinchoon Kim
The CMU design automation system: An example of automated data path design. DAC (1979)
Daniel P. Siewiorek, Donald E. Thomas, Don L. Scharfetter
The Use of LSI Modules in Computer Structures: Trends and Limitations. Computer 11 (7) (1978)
Edward A. Snow, Daniel P. Siewiorek, Donald E. Thomas
A technology-relative computer-aided design system: Abstract representations, transformations, and design tradeoffs. DAC (1978)
Donald E. Thomas, Daniel P. Siewiorek
Measuring designer performance to verify design automation systems. DAC (1977)