Herman Schmit

Publication Activity (10 Years)

Years Active: 1993-2023
Publications (10 Years): 8

Top Topics

Reservoir Computing

Reconfigurable Hardware

Hardware Architecture

Top Venues

Publications

Alessandro Tempia Calvino, Alan Mishchenko, Herman Schmit, Ethan Mahintorabi, Giovanni De Micheli, Xiaoqing Xu
Improving Standard-Cell Design Flow using Factored Form Optimization. DAC (2023)
Matthew Denton, Herman Schmit
Direct Spatial Implementation of Sparse Matrix Multipliers for Reservoir Computing. HPCA (2022)
Herman Schmit, Matthew Denton
Multi-input Serial Adders for FPGA-like Computational Fabric. FPGA (2022)
Matthew Denton, Herman Schmit
Direct Spatial Implementation of Sparse Matrix Multipliers for Reservoir Computing. CoRR (2021)
David M. Lewis, Herman Schmit
Spatial Timing Analysis With Exact Propagation of Delay and Application to FPGA Performance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (11) (2019)
David Greenhill, Ron Ho, David M. Lewis, Herman Schmit, Kok Hong Chan, Andy Tong, Sean Atsatt, Dana How, Peter McElheny, Keith Duwel, Jeffrey Schulz, Darren Faulkner, Gopal Iyer, George Chen, Hee Kong Phoon, Han Wooi Lim, Wei-Yee Koay, Ty Garibay
3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration. ISSCC (2017)
Carl Ebeling, Dana How, David M. Lewis, Herman Schmit
Stratix™ 10 High Performance Routable Clock Networks. FPGA (2016)
Herman Schmit, Randy Huang
Dissecting Xeon + FPGA: Why the integration of CPUs and FPGAs makes a power difference for the datacenter: Invited Paper. ISLPED (2016)
Herman Schmit, Amit Gupta, Radu Ciobanu
Placement challenges for structured ASICs. ISPD (2008)
Herman Schmit, Vikas Chandra
Layout techniques for FPGA switch blocks. IEEE Trans. Very Large Scale Integr. Syst. 13 (1) (2005)
Vikas Chandra, Herman Schmit, Anthony Xu, Lawrence T. Pileggi
A power aware system level interconnect design methodology for latency-insensitive systems. ICCAD (2004)
R. Reed Taylor, Herman Schmit
Enabling energy efficiency in via-patterned gate array devices. DAC (2004)
R. Reed Taylor, Herman Schmit
Creating a power-aware structured ASIC. ISLPED (2004)
Theo Theocharides, Greg M. Link, Eric J. Swankoski, Narayanan Vijaykrishnan, Mary Jane Irwin, Herman Schmit
Evaluating Alternative Implementations for LDPC Decoder Check Node Function. ISVLSI (2004)
Vikas Chandra, Anthony Xu, Herman Schmit
A low power approach to system level pipelined interconnect design. SLIP (2004)
Vikas Chandra, Anthony Xu, Herman Schmit, Lawrence T. Pileggi
An Interconnect Channel Design Methodology for High Performance Integrated Circuits. DATE (2004)
Chetan Patel, Anthony Cozzie, Herman Schmit, Lawrence T. Pileggi
An architectural exploration of via patterned gate arrays. ISPD (2003)
Lawrence T. Pileggi, Herman Schmit, Andrzej J. Strojwas, Padmini Gopalakrishnan, V. Kheterpal, Aneesh Koorapaty, Chetan Patel, Vyacheslav Rovner, K. Y. Tong
Exploring regular fabrics to optimize the performance-cost trade-off. DAC (2003)
Herman Schmit
Extra-dimensional Island-Style FPGAs. FPL (2003)
Aneesh Koorapaty, Lawrence T. Pileggi, Herman Schmit
Heterogeneous Logic Block Architectures for Via-Patterned Programmable Fabrics. FPL (2003)
Matthew Moe, Herman Schmit
Floorplanning of pipelined array modules using sequence pairs. ISPD (2003)
Aneesh Koorapaty, Vikas Chandra, K. Y. Tong, Chetan Patel, Lawrence T. Pileggi, Herman Schmit
Heterogeneous Programmable Logic Block Architectures. DATE (2003)
Herman Schmit, Thomas Kroll, Max Khusid, Ivan S. Kourtev, Narayanan Vijaykrishnan, David L. Landis
The Sandbox Design Experience Course. MSE (2003)
K. Y. Tong, V. Kheterpal, Vyacheslav Rovner, Lawrence T. Pileggi, Herman Schmit
Regular logic fabrics for a via patterned gate array (VPGA). CICC (2003)
Hiroto Kagotani, Herman Schmit
Asynchronous PipeRench: Architecture and Performance Estimations. FCCM (2003)
Benjamin A. Levine, Herman Schmit
Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable. FCCM (2003)
Thomas Kroll, Herman Schmit, Dave Landis
CAD Tool Support For A Multi-University Soc Certificate Program: The Digital Sandbox. MSE (2003)
Vikas Chandra, Herman Schmit
Simultaneous Optimization of Driving Buffer and Routing Switch Sizes in an FPGA using an Iso-Area Approach. ISVLSI (2002)
Herman Schmit, Benjamin A. Levine, Benjamin Ylvisaker
Queue Machines: Hardware Compilation in Hardware. FCCM (2002)
Herman Schmit, Vikas Chandra
FPGA switch block layout and evaluation. FPGA (2002)
Herman Schmit, David Whelihan, Andrew Tsai, Matthew Moe, Benjamin A. Levine, R. Reed Taylor
PipeRench: A virtualized programmable datapath in 0.18 micron technology. CICC (2002)
Silviu M. S. A. Chiricescu, Michael A. Schuette, Robin Glinton, Herman Schmit
Morphable Multipliers. FPL (2002)
Silviu M. S. A. Chiricescu, Michael A. Schuette, Herman Schmit, Robin Glinton
Synthesis of Morphable Multipliers. IWLS (2002)
David Whelihan, Herman Schmit
Memory optimization in single chip network switch fabrics. DAC (2002)
Pradeep K. Khosla, Herman Schmit, Mary Jane Irwin, Narayanan Vijaykrishnan, Tom Cain, Steven P. Levitan, Dave Landis
SoC Design Skills: Collaboration Builds a Stronger SoC Design Team. MSE (2001)
Seth Copen Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matthew Moe, R. Reed Taylor
PipeRench: A Reconfigurable Architecture and Compiler. Computer 33 (4) (2000)
Herman Schmit, David Whelihan, Peter Kamarchik, Frank Gennari
Scalable interconnect and power distribution for island-style FPGAs (poster abstract). FPGA (2000)
Benjamin A. Levine, R. Reed Taylor, Herman Schmit
Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware. FCCM (2000)
Herman Schmit, Srihari Cadambi, Matthew Moe, Seth Copen Goldstein
Pipeline Reconfigurable FPGAs. J. VLSI Signal Process. 24 (2-3) (2000)
Yuan C. Chou, Pazhani Pillai, Herman Schmit, John Paul Shen
PipeRench implementation of the instruction path coprocessor. MICRO (2000)
Herman Schmit, Ray Andraka, Philip Friedin, Satnam Singh, Tim Southgate
The John Henry Syndrome (panel session)(abstract only): humans vs. machines as FPGA designers. FPGA (2000)
Christopher Inacio, Herman Schmit, David Nagle, Andrew Ryan, Donald E. Thomas, Yingfai Tong, Ben Klass
Vertical Benchmarks for CAD. DAC (1999)
Bharath Ramasubramanian, Herman Schmit, L. Richard Carley
Mixed-swing quadrail for low power dual-rail domino logic. ISLPED (1999)
Seth Copen Goldstein, Herman Schmit, Matthew Moe, Mihai Budiu, Srihari Cadambi, R. Reed Taylor, Ronald Laufer
PipeRench: A Coprocessor for Streaming multimedia Acceleration. ISCA (1999)
Herman Schmit
Extra-Dimensional Island-Style FPGAs. FPGA (1999)
Ronald Laufer, R. Reed Taylor, Herman Schmit
PCI-PipeRench and the SWORDAPI: A System for Stream-Based Reconfigurable Computing. FCCM (1999)
Matthew Moe, Herman Schmit, Seth Copen Goldstein
Characterization and Parameterization of a Pipeline Reconfigurable FPGA. FCCM (1998)
Ram Krishnamurthy, Herman Schmit, L. Richard Carley
A low-power 16-bit multiplier-accumulator using series-regulated mixed swing techniques. CICC (1998)
Srihari Cadambi, Jeffrey Weener, Seth Copen Goldstein, Herman Schmit, Donald E. Thomas
Managing Pipeline-Reconfigurable FPGAs. FPGA (1998)
Herman Schmit, Donald E. Thomas
Address generation for memories containing multiple arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (5) (1998)
Herman Schmit
Is Reconfigurable Computing Commercially Viable (panel)? FPGA (1997)
Herman Schmit
Incremental reconfiguration for pipelined applications. FCCM (1997)
Herman Schmit, Donald E. Thomas
Synthesis of application-specific memory designs. IEEE Trans. Very Large Scale Integr. Syst. 5 (1) (1997)
Herman Schmit, Donald E. Thomas
Address generation for memories containing multiple arrays. ICCAD (1995)
Herman Schmit, Donald E. Thomas
Array mapping in behavioral synthesis. ISSS (1995)
Herman Schmit, Donald E. Thomas
Hidden Markov modeling and fuzzy controllers in FPGAs. FCCM (1995)
Donald E. Thomas, Jay K. Adams, Herman Schmit
A Model and Methodology for Hardware-Software Codesign. IEEE Des. Test Comput. 10 (3) (1993)