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SLIP
2000
2005
2015
2023
2000
2023
Keyphrases
Publications
2023
Raveena Raikar
,
Dirk Stroobandt
Modularity Driven Parallel Placement Algorithm for 2.5D FPGA Architectures.
SLIP
(2023)
Seonghyeon Park
,
Daeyeon Kim
,
Seokhyeong Kang
Invited: Acceleration on Physical Design: Machine Learning-based Routability Optimization.
SLIP
(2023)
Proceedings of the ACM International Workshop on System-Level Interconnect Pathfinding, SLIP 2023, San Francisco, CA, USA, 2 November 2023
SLIP
(2023)
Marieke Louage
,
Muhammad Mazher Iqbal
,
Dirk Stroobandt
On the Interconnection Complexity vs Size Trade-off in Circuit Graphs.
SLIP
(2023)
Chung-Kuan Cheng
,
Andrew B. Kahng
,
Bill Lin
,
Yucheng Wang
,
Dooseok Yoon
Gear-Ratio-Aware Standard Cell Layout Framework for DTCO Exploration.
SLIP
(2023)
Chung-Kuan Cheng
,
Bill Lin
,
Byeonggon Kang
,
Yucheng Wang
Invited Paper: The Scope and Challenges of Scaling in Advanced Technologies.
SLIP
(2023)
Arghavan Mohammadhassani
,
Anup Das
Improving Performance of Network-on-Memory Architectures via (De-)/Compression-in-DRAM.
SLIP
(2023)
2022
Tianyi Yu
,
Nima Karimpour Darav
,
Ismail Bustany
,
Mehrdad Eslami Dehkordi
A Machine Learning Approach for Accelerating SimPL-Based Global Placement for FPGA's.
SLIP
(2022)
Rongmei Chen
,
Giuliano Sisto
,
Odysseas Zografos
,
Dragomir Milojevic
,
Pieter Weckx
,
Geert Van der Plas
,
Eric Beyne
Opportunities of Chip Power Integrity and Performance Improvement through Wafer Backside (BS) Connection: Invited Paper.
SLIP
(2022)
A. Philippe
,
Lorenzo Ciampolini
,
A. Philippe
,
M. Gerbaud
,
M. Ramirez-Corrales
,
Valentin Egloff
,
Bastien Giraud
,
Jean-Philippe Noël
An Automated Design Methodology for Computational SRAM Dedicated to Highly Data-Centric Applications: Invited Paper.
SLIP
(2022)
Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding, SLIP 2022, San Diego, California, 3 November 2022
SLIP
(2022)
Raveena Raikar
,
Dirk Stroobandt
Multi-Die Heterogeneous FPGAs: How Balanced Should Netlist Partitioning be?
SLIP
(2022)
Jaehoon Ahn
,
Taewhan Kim
Neural Network Model for Detour Net Prediction.
SLIP
(2022)
Hailiang Hu
,
Jiang Hu
,
Fan Zhang
,
Bing Tian
,
Ismail Bustany
Machine-Learning Based Delay Prediction for FPGA Technology Mapping.
SLIP
(2022)
Xiuyan Zhang
,
Shantanu Dutt
Limiting Interconnect Heating in Power-Driven Physical Synthesis.
SLIP
(2022)
2021
Minmin Jiang
,
Vasilis F. Pavlidis
Performance-Aware Interconnect Delay Insertion Against EM Side-Channel Attacks.
SLIP
(2021)
ACM/IEEE International Workshop on System Level Interconnect Prediction, SLIP 2021, Munich, Germany, November 4, 2021
SLIP
(2021)
Joris Van Campenhout
Silicon Photonics Technology for Terabit-scale Optical I/O (Invited).
SLIP
(2021)
Giuliano Sisto
,
Rongmei Chen
,
Richard Chou
,
Geert Van der Plas
,
Eric Beyne
,
Rod Metcalfe
,
Dragomir Milojevic
Design And Sign-off Methodologies For Wafer-To-Wafer Bonded 3D-ICs At Advanced Nodes (invited).
SLIP
(2021)
Suresh Ramalingam
Enabling Chiplet Integration Beyond 7nm (Invited).
SLIP
(2021)
Babak Sharifpour
,
Mohammad Sharifpour
,
Midia Reshadi
SID-Mesh: Diagonal Mesh Topology for Silicon Interposer in 2.5D NoC with Introducing a New Routing Algorithm.
SLIP
(2021)
Bapi Vinnakota
The Open Domain-Specific Architecture: An Introduction (Invited).
SLIP
(2021)
Houman Zahedmanesh
,
Ivan Ciofi
,
Odysseas Zografos
,
Mustafa Badaroglu
,
Kristof Croes
A Novel System-Level Physics-Based Electromigration Modelling Framework: Application to the Power Delivery Network.
SLIP
(2021)
Giovanna Calò
,
Marina Barbiroli
,
Gaetano Bellanca
,
Davide Bertozzi
,
Franco Fuschini
,
Velio Tralli
,
Giovanni Serafino
,
Vincenzo Petruzzelli
Reconfigurable on-chip wireless interconnections through optical phased arrays (Invited).
SLIP
(2021)
Jitesh Choudhary
,
Soumya J.
,
Linga Reddy Cenkeramaddi
RAMAN: Reinforcement Learning Inspired Algorithm for Mapping Applications onto Mesh Network-on-Chip.
SLIP
(2021)
Tanay Karnik
Recent Advances and Future Challenges in 2.5D/3D Heterogeneous Integration (Invited).
SLIP
(2021)
Chung-Kuan Cheng
,
Chia-Tung Ho
,
Chester Holtz
,
Bill Lin
Design and System Technology Co-Optimization Sensitivity Prediction for VLSI Technology Development using Machine Learning.
SLIP
(2021)
Tiago Mück
Network-on-Chips for Future 3D Stacked Dies (Invited).
SLIP
(2021)
Makoto Nagata
Chip Stacking and Packaging Technology Explorations for Hardware Security (Invited).
SLIP
(2021)
Yvain Thonnart
Designing a Multi-Chiplet Manycore System using the POPSTAR Optical NoC Architecture (Invited).
SLIP
(2021)
2020
SLIP '20: System-Level Interconnect - Problems and Pathfinding Workshop, San Diego, California, November 5, 2020
SLIP
(2020)
Saptadeep Pal
,
Puneet Gupta
Pathfinding for 2.5D interconnect technologies.
SLIP
(2020)
Mustafa Badaroglu
Outlook of device and assembly technologies enabling high-performance mobile computing: IRDS view (invited).
SLIP
(2020)
Barry C. Sanders
Building a quantum computer (invited).
SLIP
(2020)
Jason Orcutt
Extending quantum systems with optical interconnects (invited).
SLIP
(2020)
Patrick Groeneveld
Wafer scale interconnect and pathfinding for machine learning hardware (invited).
SLIP
(2020)
Abhishek Kumar Jain
Role of on-chip networks in building domain-specific architectures (DSAs) for sparse computations (invited).
SLIP
(2020)
Tahereh Jabbari
,
Eby G. Friedman
Global interconnects in VLSI complexity single flux quantum systems.
SLIP
(2020)
Hamed Fatemi
,
Andrew B. Kahng
,
Minsoo Kim
,
José Pineda de Gyvez
-active dynamic power.
SLIP
(2020)
Kevin Kauth
,
Tim Stadtmann
,
Ruben Brandhofer
,
Vida Sobhani
,
Tobias Gemmeke
Communication architecture enabling 100x accelerated simulation of biological neural networks.
SLIP
(2020)
Tuck-Boon Chan
,
Andrew B. Kahng
,
Mingyu Woo
Revisiting inherent noise floors for interconnect prediction.
SLIP
(2020)
Jonathan D'Hoore
,
Poona Bahrebar
,
Dirk Stroobandt
3D NoC emulation model on a single FPGA.
SLIP
(2020)
Raid Ayoub
,
Michael Kishinevsky
,
Sumit K. Mandal
,
Ümit Y. Ogras
Analytical modeling of NoCs for fast simulation and design exploration (invited).
SLIP
(2020)
2019
21st ACM/IEEE International Workshop on System Level Interconnect Prediction, SLIP 2019, Las Vegas, NV, USA, June 1-2, 2019
SLIP
(2019)
Yiming Wen
,
Sayyed Farid Ahamed
,
Weize Yu
A Novel PUF Architecture Against Non-Invasive Attacks.
SLIP
(2019)
Zheng Xu
,
Jacob Abraham
FSNoC: Safe Network-on-Chip Design with Packet Level Lock Stepping.
SLIP
(2019)
Longfei Wang
,
Ragh Kuttappa
,
Baris Taskin
,
Selçuk Köse
Distributed Digital Low-Dropout Regulators with Phase Interleaving for On-Chip Voltage Noise Mitigation.
SLIP
(2019)
Chak-Wa Pui
,
Gang Wu
,
Freddy Y. C. Mang
,
Evangeline F. Y. Young
An Analytical Approach for Time-Division Multiplexing Optimization in Multi-FPGA based Systems.
SLIP
(2019)
Farid Kenarangi
,
Inna Partin-Vaisband
Security Network On-Chip for Mitigating Side-Channel Attacks.
SLIP
(2019)
Boris Vaisband
,
Subramanian S. Iyer
Communication Considerations for Silicon Interconnect Fabric.
SLIP
(2019)