Suresh Ramalingam

Publication Activity (10 Years)

Years Active: 2012-2021
Publications (10 Years): 4

Top Topics

Technical Aspects

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Top Venues

Hot Chips Symposium

Publications

Suresh Ramalingam
Enabling Chiplet Integration Beyond 7nm (Invited). SLIP (2021)
Gamal Refai-Ahmed, Hoa Do, I-Ru Chen, Jae-Gyung Ahn, Huayan Wang, Xin Wu, Suresh Ramalingam
CCECE 2021 Invited Paper: Holistic Performance, Reliability and Thermal Understanding of HPC Real Utilization on Silicon Architecture. CCECE (2021)
Kang Wook Lee, Ai Nakamura, Jicheol Bea, Takafumi Fukushima, Suresh Ramalingam, Xin Wu, Tanaka Tanaka, Mitsumasa Koyanagi
Nano-scale Cu direct bonding using ultra-high density Cu nano-pillar (CNP) for high yield exascale 2.5/3D integration applications. 3DIC (2016)
Suresh Ramalingam
HBM package integration: Technology trends, challenges and applications. Hot Chips Symposium (2016)
Ephrem Wu, Khaldoon Abugharbieh, Bahareh Banijamali, Suresh Ramalingam, Paul Wu, Chris Wyland
Interconnect and package design of a heterogeneous stacked-silicon FPGA. CICC (2013)
Ephrem Wu, Suresh Ramalingam
FPGAs with 28Gb/s transceivers built with heterogeneous stacked-silicon interconnects. Hot Chips Symposium (2012)
Liam Madden, Ephrem Wu, Namhoon Kim, Bahareh Banijamali, Khaldoon Abugharbieh, Suresh Ramalingam, Xin Wu
Advancing high performance heterogeneous integration through die stacking. ESSCIRC (2012)