Kang Wook Lee

Publication Activity (10 Years)

Years Active: 1998-2016
Publications (10 Years): 3

Top Topics

Dynamic Random Access Memory

Cmos Image Sensor

Top Venues

Publications

Kang Wook Lee, Ai Nakamura, Jicheol Bea, Takafumi Fukushima, Suresh Ramalingam, Xin Wu, Tanaka Tanaka, Mitsumasa Koyanagi
Nano-scale Cu direct bonding using ultra-high density Cu nano-pillar (CNP) for high yield exascale 2.5/3D integration applications. 3DIC (2016)
Takafumi Fukushima, Hideto Hashiguchi, Hiroshi Yonekura, Hisashi Kino, Mariappan Murugesan, Ji Chel Bea, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Oxide-Oxide Thermocompression Direct Bonding Technologies with Capillary Self-Assembly for Multichip-to-Wafer Heterogeneous 3D System Integration. Micromachines 7 (10) (2016)
Takafumi Fukushima, Mariappan Murugesan, Shin Ohsaki, Hiroyuki Hashimoto, Jichoel Bea, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
New concept of TSV formation methodology using Directed Self-Assembly (DSA). 3DIC (2016)
Kang Wook Lee, Ji Chel Bea, Mariappan Murugesan, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Impacts of 3-D integration processes on device reliabilities in thinned DRAM chip for 3-D DRAM. IRPS (2015)
Takafumi Fukushima, Taku Suzuki, Hideto Hashiguchi, Chisato Nagai, Jichoel Bea, Hiroyuki Hashimoto, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Kazushi Asami, Yasuhiro Kitamura, Mitsumasa Koyanagi
Transfer and non-transfer stacking technologies based on chip-to-wafer self-asembly for high-throughput and high-precision alignment and microbump bonding. 3DIC (2015)
Yangyang Yan, Yingtao Ding, Qianwen Chen, Kang Wook Lee, Takafumi Fukushima, Mitsumasa Koyanagi
Vacuum-assisted-spin-coating of polyimide liner for high-aspect-ratio TSVs applications. 3DIC (2015)
Takafumi Fukushima, Yuka Ito, Mariappan Murugesan, Jicheol Bea, Kang Wook Lee, Koji Choki, Tetsu Tanaka, Mitsumasa Koyanagi
Tiny VCSEL chip self-assembly for advanced chip-to-wafer 3D and hetero integration. 3DIC (2014)
Kouji Kiyoyama, Y. Sato, Hiroyuki Hashimoto, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
A block-parallel ADC with digital noise cancelling for 3-D stacked CMOS image sensor. 3DIC (2013)
Takafumi Fukushima, Jichoel Bea, Mariappan Murugesan, Ho-Young Son, M.-S. Suh, K.-Y. Byun, N.-S. Kim, Kang Wook Lee, Mitsumasa Koyanagi
3D memory chip stacking by multi-layer self-assembly technology. 3DIC (2013)
Kang Wook Lee, Seiya Tanikawa, Mariappan Murugesan, H. Naganuma, Jichoel Bea, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory. 3DIC (2013)
Mariappan Murugesan, Jichoel Bea, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi, Yuji Sutou, H. Wang, J. Koike
Effect of CVD Mn oxide layer as Cu diffusion barrier for TSV. 3DIC (2013)
Takafumi Fukushima, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Mitsumasa Koyanagi
Development of via-last 3D integration technologies using a new temporary adhesive system. 3DIC (2013)
Hiroyuki Hashimoto, Takafumi Fukushima, Kang Wook Lee, Mitsumasa Koyanagi, Tetsu Tanaka
Highly efficient TSV repair technology for resilient 3-D stacked multicore processor system. 3DIC (2013)
Takafumi Fukushima, Yuki Ohara, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Temporary bonding strength control for self-assembly-based 3D integration. 3DIC (2011)
Kouji Kiyoyama, Kang Wook Lee, Takafumi Fukushima, H. Naganuma, H. Kobayashi, Tetsu Tanaka, Mitsumasa Koyanagi
A very low area ADC for 3-D stacked CMOS image processing system. 3DIC (2011)
Akihiro Noriki, Kang Wook Lee, Jichoel Bea, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Fabrication tolerance evaluation of high efficient unidirectional optical coupler for though silicon photonic via in optoelectronic 3D-LSI. 3DIC (2011)
Kazuyuki Hozawa, Futoshi Furuta, Yuko Hanaoka, Mayu Aoki, Kenichi Takeda, Katsuyuki Sakuma, Kang Wook Lee, Takafumi Fukushima, Mitsumasa Koyanagi
Chip-level TSV integration for rapid prototyping of 3D system LSIs. 3DIC (2011)
Takafumi Fukushima, Takayuki Konno, Eiji Iwata, Risato Kobayashi, Toshiya Kojima, Mariappan Murugesan, Ji Chel Bea, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Self-Assembly of Chip-Size Components with Cavity Structures: High-Precision Alignment and Direct Bonding without Thermal Compression for Hetero Integration. Micromachines 2 (1) (2011)
Kang Wook Lee, Jichoel Bea, Takafumi Fukushima, Yuki Ohara, Tetsu Tanaka, Mitsumasa Koyanagi
High reliable and fine size of 5-μm diameter backside Cu through-silicon Via(TSV) for high reliability and high-end 3-D LSIs. 3DIC (2011)
Yuki Ohara, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Novel detachable bonding process with wettability control of bonding surface for versatile chip-level 3D integration. 3DIC (2011)
Akihiro Noriki, Kang Wook Lee, Jichoel Bea, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Through Silicon photonic via (TSPV) with Si core for low loss and high-speed data transmission in opto-electronic 3-D LSI. 3DIC (2010)
Kouji Kiyoyama, Kang Wook Lee, Takafumi Fukushima, H. Naganuma, Hiroaki Kobayashi, Tetsu Tanaka, Mitsumasa Koyanagi
A block-parallel signal processing system for CMOS image sensor with three-dimensional structure. 3DIC (2010)
Takafumi Fukushima, Eiji Iwata, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature. 3DIC (2010)
Mariappan Murugesan, Yuki Ohara, Jichoel Bea, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding. 3DIC (2010)
Kouji Kiyoyama, Yuki Ohara, Kang Wook Lee, Y. Yang, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
A parallel ADC for high-speed CMOS image processing system with 3D structure. 3DIC (2009)
Kang Wook Lee, Shigeyuki Kanno, Yuki Ohara, Kouji Kiyoyama, Ji Chel Bea, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Heterogeneous integration technology for MEMS-LSI multi-chip module. 3DIC (2009)
Yoshiyuki Kaiho, Yuki Ohara, Hirotaka Takeshita, Kouji Kiyoyama, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
3D integration technology for 3D stacked retinal chip. 3DIC (2009)
Yuki Ohara, Akihiro Noriki, Katsuyuki Sakuma, Kang Wook Lee, Mariappan Murugesan, Jichoel Bea, Fumiaki Yamada, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack. 3DIC (2009)
Ji Chel Bea, Mariappan Murugesan, Yuki Ohara, Akihiro Noriki, Hisashi Kino, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Micro-Raman spectroscopy analysis and capacitance - time (C-t) measurement of thinned silicon substrates for 3D integration. 3DIC (2009)
Hiroyuki Kurino, Masaki Nakagawa, Kang Wook Lee, Tomonori Nakamura, Yuusuke Yamada, Ki Tae Park, Mitsumasa Koyanagi
Smart Vision Chip Fabricated Using Three Dimensional Integration Technology. NIPS (2000)
Mitsumasa Koyanagi, Hiroyuki Kurino, Kang Wook Lee, Katsuyuki Sakuma, Nobuaki Miyakawa, Hikotaro Itani
Future system-on-silicon LSI chips. IEEE Micro 18 (4) (1998)