Mariappan Murugesan

Publication Activity (10 Years)

Years Active: 2009-2023
Publications (10 Years): 12

Top Topics

Sensor Technology

Surface Features

Top Venues

Publications

Jiayi Shen, Chang Liu, Tadaaki Hoshi, Atsushi Sinoda, Hisashi Kino, Tetsu Tanaka, Mariappan Murugesan, Mitsumasa Koyanagi, Takafumi Fukushima
Impact of Super-long-throw PVD on TSV Metallization and Die-to-Wafer 3D Integration Based on Via-last. 3DIC (2023)
Mariappan Murugesan, M. Sawa, E. Sone, Makoto Motoyoshi, Mitsumasa Koyanagi, Takafumi Fukushima
Copper Electrode Surface Features and Cu-SiO2Hybrid Bonding. 3DIC (2023)
Mariappan Murugesan, E. Sone, A. Simomura, Makoto Motoyoshi, M. Sawa, K. Fukuda, Mitsumasa Koyanagi, Takafumi Fukushima
Cu-Cu Direct Bonding Through Highly Oriented Cu Grains for 3D-LSI Applications. 3DIC (2021)
Takafumi Fukushima, Shinichi Sakuyama, Masatomo Takahashi, Hiroyuki Hashimoto, Jichoel Bea, Theodorus Marcello, Hisashi Kino, Tetsu Tanaka, Mitsumasa Koyanagi, Mariappan Murugesan
Integration of Damage-less Probe Cards Using Nano-TSV Technology for Microbumped Wafer Testing. 3DIC (2021)
Mariappan Murugesan, Mitsumasa Koyanagi, Hiroyuki Hashimoto, Ji Chel Bea, Takafumi Fukushima
Fabrication and Morphological Characterization of Nano-Scale Interconnects for 3D-Integration. 3DIC (2019)
Rui Liang, Sungho Lee, Yuki Miwa, Kousei Kumahara, Mariappan Murugesan, Hisashi Kino, Takafumi Fukushima, Tetsu Tanaka
Impacts of Deposition Temperature and Annealing Condition on Ozone-Ethylene Radical Generation-TEOS-CVD SiO2 for Low-Temperature TSV Liner Formation. 3DIC (2019)
Mariappan Murugesan, Mitsumasa Koyanagi, Takafumi Fukushima
Growth Optimization of Multi-Layer Graphene for Thermal-TSV Application in 3D-LSI. 3DIC (2019)
Mariappan Murugesan, Takafumi Fukushima, Ji Chel Bea, Hiroyuki Hashimoto, Mitsu Koyanagi
Intra- and inter-chip electrical interconnection formed by directed self assembly of nanocomposite containing diblock copolymer and nanometal. IRPS (2018)
Mariappan Murugesan, Jichel Bea, Takafumi Fukushima, Makoto Motoyoshi, Tetsu Tanaka, Mitsumasa Koyanagi
Improving the integrity of Ti barrier layer in Cu-TSVs through self-formed TiSix for via-last TSV technology. 3DIC (2016)
Takafumi Fukushima, Hideto Hashiguchi, Hiroshi Yonekura, Hisashi Kino, Mariappan Murugesan, Ji Chel Bea, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Oxide-Oxide Thermocompression Direct Bonding Technologies with Capillary Self-Assembly for Multichip-to-Wafer Heterogeneous 3D System Integration. Micromachines 7 (10) (2016)
Takafumi Fukushima, Mariappan Murugesan, Shin Ohsaki, Hiroyuki Hashimoto, Jichoel Bea, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
New concept of TSV formation methodology using Directed Self-Assembly (DSA). 3DIC (2016)
Makoto Motoyoshi, Kohki Yanagimura, Taikoh Fushimi, Junichi Takanohashi, Mariappan Murugesan, Masahiro Aoyagi, Mitsumasa Koyanagi
3 Dimensional stacked pixel detector and sensor technology using less than 3-μmφ robust bump junctions. 3DIC (2016)
Mariappan Murugesan, Jichoel Bea, Hiroyuki Hashimoto, K. W. Lee, Mitsu Koyanagi, Takafumi Fukushima, Tetsu Tanaka
Mitigating thermo mechanical stress in high-density 3D-LSI through dielectric liners in Cu- through silicon Via _ µ-RS and µ-XRD study. 3DIC (2015)
Kang Wook Lee, Ji Chel Bea, Mariappan Murugesan, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Impacts of 3-D integration processes on device reliabilities in thinned DRAM chip for 3-D DRAM. IRPS (2015)
Takafumi Fukushima, Taku Suzuki, Hideto Hashiguchi, Chisato Nagai, Jichoel Bea, Hiroyuki Hashimoto, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Kazushi Asami, Yasuhiro Kitamura, Mitsumasa Koyanagi
Transfer and non-transfer stacking technologies based on chip-to-wafer self-asembly for high-throughput and high-precision alignment and microbump bonding. 3DIC (2015)
K. W. Lee, Chisato Nagai, Ai Nakamura, Ji Chel Bea, Mariappan Murugesan, Takafumi Fukushima, Tanaka Tanaka, Mitsumasa Koyanagi
Effects of electro-less Ni layer as barrier/seed layers for high reliable and low cost Cu TSV. 3DIC (2014)
Mariappan Murugesan, Takafumi Fukushima, Ji Chel Bea, K. W. Lee, Mitsu Koyanagi, Y. Imai, S. Kimura, Tetsu Tanaka
Micro-XRD investigation of fine-pitch Cu-TSV induced thermo-mechanical stress in high-density 3D-LSI. 3DIC (2014)
Takafumi Fukushima, Yuka Ito, Mariappan Murugesan, Jicheol Bea, Kang Wook Lee, Koji Choki, Tetsu Tanaka, Mitsumasa Koyanagi
Tiny VCSEL chip self-assembly for advanced chip-to-wafer 3D and hetero integration. 3DIC (2014)
Takafumi Fukushima, Jichoel Bea, Mariappan Murugesan, Ho-Young Son, M.-S. Suh, K.-Y. Byun, N.-S. Kim, Kang Wook Lee, Mitsumasa Koyanagi
3D memory chip stacking by multi-layer self-assembly technology. 3DIC (2013)
Kang Wook Lee, Seiya Tanikawa, Mariappan Murugesan, H. Naganuma, Jichoel Bea, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory. 3DIC (2013)
Mariappan Murugesan, Jichoel Bea, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi, Yuji Sutou, H. Wang, J. Koike
Effect of CVD Mn oxide layer as Cu diffusion barrier for TSV. 3DIC (2013)
Takafumi Fukushima, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Mitsumasa Koyanagi
Development of via-last 3D integration technologies using a new temporary adhesive system. 3DIC (2013)
Takafumi Fukushima, Yuki Ohara, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Temporary bonding strength control for self-assembly-based 3D integration. 3DIC (2011)
Mariappan Murugesan, Harufumi Kobayashi, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
High density Cu-TSVs and reliability issues. 3DIC (2011)
Mariappan Murugesan, Hideto Hashiguchi, Harufumi Kobayashi, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
W/Cu TSVs for 3D-LSI with minimum thermo-mechanical stress. 3DIC (2011)
Takafumi Fukushima, Takayuki Konno, Eiji Iwata, Risato Kobayashi, Toshiya Kojima, Mariappan Murugesan, Ji Chel Bea, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Self-Assembly of Chip-Size Components with Cavity Structures: High-Precision Alignment and Direct Bonding without Thermal Compression for Hetero Integration. Micromachines 2 (1) (2011)
Takafumi Fukushima, Eiji Iwata, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature. 3DIC (2010)
Mariappan Murugesan, Yuki Ohara, Jichoel Bea, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding. 3DIC (2010)
Yuki Ohara, Akihiro Noriki, Katsuyuki Sakuma, Kang Wook Lee, Mariappan Murugesan, Jichoel Bea, Fumiaki Yamada, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack. 3DIC (2009)
Ji Chel Bea, Mariappan Murugesan, Yuki Ohara, Akihiro Noriki, Hisashi Kino, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Micro-Raman spectroscopy analysis and capacitance - time (C-t) measurement of thinned silicon substrates for 3D integration. 3DIC (2009)