Jichoel Bea

Publication Activity (10 Years)

Years Active: 2009-2021
Publications (10 Years): 2

Top Topics

Diffusion Processes

Chemical Vapor Deposition

Memory Subsystem

Top Venues

Publications

Takafumi Fukushima, Shinichi Sakuyama, Masatomo Takahashi, Hiroyuki Hashimoto, Jichoel Bea, Theodorus Marcello, Hisashi Kino, Tetsu Tanaka, Mitsumasa Koyanagi, Mariappan Murugesan
Integration of Damage-less Probe Cards Using Nano-TSV Technology for Microbumped Wafer Testing. 3DIC (2021)
Takafumi Fukushima, Mariappan Murugesan, Shin Ohsaki, Hiroyuki Hashimoto, Jichoel Bea, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
New concept of TSV formation methodology using Directed Self-Assembly (DSA). 3DIC (2016)
Mariappan Murugesan, Jichoel Bea, Hiroyuki Hashimoto, K. W. Lee, Mitsu Koyanagi, Takafumi Fukushima, Tetsu Tanaka
Mitigating thermo mechanical stress in high-density 3D-LSI through dielectric liners in Cu- through silicon Via _ µ-RS and µ-XRD study. 3DIC (2015)
Takafumi Fukushima, Taku Suzuki, Hideto Hashiguchi, Chisato Nagai, Jichoel Bea, Hiroyuki Hashimoto, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Kazushi Asami, Yasuhiro Kitamura, Mitsumasa Koyanagi
Transfer and non-transfer stacking technologies based on chip-to-wafer self-asembly for high-throughput and high-precision alignment and microbump bonding. 3DIC (2015)
Takafumi Fukushima, Jichoel Bea, Mariappan Murugesan, Ho-Young Son, M.-S. Suh, K.-Y. Byun, N.-S. Kim, Kang Wook Lee, Mitsumasa Koyanagi
3D memory chip stacking by multi-layer self-assembly technology. 3DIC (2013)
Kang Wook Lee, Seiya Tanikawa, Mariappan Murugesan, H. Naganuma, Jichoel Bea, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory. 3DIC (2013)
Mariappan Murugesan, Jichoel Bea, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi, Yuji Sutou, H. Wang, J. Koike
Effect of CVD Mn oxide layer as Cu diffusion barrier for TSV. 3DIC (2013)
Takafumi Fukushima, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Mitsumasa Koyanagi
Development of via-last 3D integration technologies using a new temporary adhesive system. 3DIC (2013)
Takafumi Fukushima, Yuki Ohara, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Temporary bonding strength control for self-assembly-based 3D integration. 3DIC (2011)
Akihiro Noriki, Kang Wook Lee, Jichoel Bea, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Fabrication tolerance evaluation of high efficient unidirectional optical coupler for though silicon photonic via in optoelectronic 3D-LSI. 3DIC (2011)
Kang Wook Lee, Jichoel Bea, Takafumi Fukushima, Yuki Ohara, Tetsu Tanaka, Mitsumasa Koyanagi
High reliable and fine size of 5-μm diameter backside Cu through-silicon Via(TSV) for high reliability and high-end 3-D LSIs. 3DIC (2011)
Akihiro Noriki, Kang Wook Lee, Jichoel Bea, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Through Silicon photonic via (TSPV) with Si core for low loss and high-speed data transmission in opto-electronic 3-D LSI. 3DIC (2010)
Takafumi Fukushima, Eiji Iwata, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature. 3DIC (2010)
Mariappan Murugesan, Yuki Ohara, Jichoel Bea, Kang Wook Lee, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding. 3DIC (2010)
Yuki Ohara, Akihiro Noriki, Katsuyuki Sakuma, Kang Wook Lee, Mariappan Murugesan, Jichoel Bea, Fumiaki Yamada, Takafumi Fukushima, Tetsu Tanaka, Mitsumasa Koyanagi
10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack. 3DIC (2009)