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Impacts of 3-D integration processes on device reliabilities in thinned DRAM chip for 3-D DRAM.
Kang Wook Lee
Ji Chel Bea
Mariappan Murugesan
Takafumi Fukushima
Tetsu Tanaka
Mitsumasa Koyanagi
Published in:
IRPS (2015)
Keyphrases
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high density
dynamic random access memory
memory subsystem
main memory
embedded dram
low voltage
field effect transistors
low cost
data center
data integration
random access memory
mobile devices
high speed
multi dimensional
cmos technology
metal oxide semiconductor