Simultaneous Optimization of Driving Buffer and Routing Switch Sizes in an FPGA using an Iso-Area Approach.
Vikas ChandraHerman SchmitPublished in: ISVLSI (2002)
Keyphrases
- simultaneous optimization
- high speed
- switched networks
- packet switching
- hardware implementation
- shortest path
- routing protocol
- ad hoc networks
- low cost
- routing algorithm
- routing problem
- software implementation
- real time image processing
- signal processing
- network topology
- field programmable gate array
- traffic conditions
- real time
- buffer size
- fpga hardware
- hardware architectures
- hardware architecture
- inter domain
- driver assistance systems
- fpga implementation
- network topologies
- low power
- autonomous driving
- intelligent vehicles
- functional verification
- verilog hdl