Mary Jane Irwin

Publication Activity (10 Years)

Years Active: 1978-2016
Publications (10 Years): 9

Top Venues

DAC

DATE

CoRR

ISLPED

Publications

Hsiang-Yun Cheng, Jishen Zhao, Jack Sampson, Mary Jane Irwin, Aamer Jaleel, Yu Lu, Yuan Xie
LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches. ISCA (2016)
Meng-Fan Chang, Ching-Hao Chuang, Yen-Ning Chiang, Shyh-Shyuan Sheu, Chia-Chen Kuo, Hsiang-Yun Cheng, John Sampson, Mary Jane Irwin
Designs of emerging memory based non-volatile TCAM for Internet-of-Things (IoT) and big-data processing: A 5T2R universal cell. ISCAS (2016)
Mark D. Hill, Sarita V. Adve, Luis Ceze, Mary Jane Irwin, David R. Kaeli, Margaret Martonosi, Josep Torrellas, Thomas F. Wenisch, David A. Wood, Katherine A. Yelick
21st Century Computer Architecture. CoRR (2016)
Mary Jane Irwin, Soha Hassoun
Steven P. Levitan (1950-2016). IEEE Des. Test 33 (3) (2016)
Mi Sun Park, Omesh Tickoo, Vijaykrishnan Narayanan, Mary Jane Irwin, Ravi Iyer
Platform-aware dynamic configuration support for efficient text processing on heterogeneous system. DATE (2015)
Hsiang-Yun Cheng, Matt Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie
EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors. ACM Trans. Archit. Code Optim. 12 (2) (2015)
Hsiang-Yun Cheng, Mary Jane Irwin, Yuan Xie
Adaptive Burst-Writes (ABW): Memory Requests Scheduling to Reduce Write-Induced Interference. ACM Trans. Design Autom. Electr. Syst. 21 (1) (2015)
Hsiang-Yun Cheng, Jia Zhan, Jishen Zhao, Yuan Xie, Jack Sampson, Mary Jane Irwin
Core vs. uncore: the heart of darkness. DAC (2015)
Hui Zhao, Mahmut T. Kandemir, Mary Jane Irwin
TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability. Conf. Computing Frontiers (2015)
Hsiang-Yun Cheng, Matthew Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie
EECache: exploiting design choices in energy-efficient last-level caches for chip multiprocessors. ISLPED (2014)
Ravindhiran Mukundrajan, Matthew Cotter, Sungmin Bae, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan
Design of energy-efficient circuits and systems using tunnel field effect transistors. IET Circuits Devices Syst. 7 (5) (2013)
Wei Ding, Jun Liu, Mahmut T. Kandemir, Mary Jane Irwin
Reshaping cache misses to improve row-buffer locality in multicore systems. PACT (2013)
Hui Zhao, Ohyoung Jang, Wei Ding, Yuanrui Zhang, Mahmut T. Kandemir, Mary Jane Irwin
A hybrid NoC design for cache coherence optimization for chip multiprocessors. DAC (2012)
Ravindhiran Mukundrajan, Matthew Cotter, Vinay Saripalli, Mary Jane Irwin, Suman Datta, Vijaykrishnan Narayanan
Ultra Low Power Circuit Design Using Tunnel FETs. ISVLSI (2012)
Mi Sun Park, Srinidhi Kestur, Jagdish Sabarad, Vijaykrishnan Narayanan, Mary Jane Irwin
An FPGA-based accelerator for cortical object classification. DATE (2012)
Wei Wang, Tanima Dey, Ryan W. Moore, Mahmut Aktasoglu, Bruce R. Childers, Jack W. Davidson, Mary Jane Irwin, Mahmut T. Kandemir, Mary Lou Soffa
REEact: a customizable virtual execution manager for multicore platforms. VEE (2012)
Akbar Sharifi, Shekhar Srikantaiah, Mahmut T. Kandemir, Mary Jane Irwin
Courteous cache sharing: being nice to others in capacity management. DAC (2012)
Hui Zhao, Mahmut T. Kandemir, Mary Jane Irwin
Exploring performance-power tradeoffs in providing reliability for NoC-based MPSoCs. ISQED (2011)
Guiling Wang, Mary Jane Irwin, Haoying Fu, Piotr Berman, Wensheng Zhang, Tom La Porta
Optimizing sensor movement planning for energy efficiency. ACM Trans. Sens. Networks 7 (4) (2011)
Hui Zhao, Mahmut T. Kandemir, Wei Ding, Mary Jane Irwin
Exploring heterogeneous NoC design space. ICCAD (2011)
Shekhar Srikantaiah, Emre Kultursay, Tao Zhang, Mahmut T. Kandemir, Mary Jane Irwin, Yuan Xie
MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy. HPCA (2011)
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
On-chip memory space partitioning for chip multiprocessors using polyhedral algebra. IET Comput. Digit. Tech. 4 (6) (2010)
Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Padma Raghavan
Dynamic core partitioning for energy efficiency. IPDPS Workshops (2010)
Aditya Yanamandra, Soumya Eachempati, Niranjan Soundararajan, Vijaykrishnan Narayanan, Mary Jane Irwin, Ramakrishnan Krishnan
Optimizing power and performance for reliable on-chip networks. ASP-DAC (2010)
Mary Jane Irwin
Technology scaling redirects main memories: technical perspective. Commun. ACM 53 (7) (2010)
Mahmut T. Kandemir, Taylan Yemliha, Sai Prashanth Muralidhara, Shekhar Srikantaiah, Mary Jane Irwin, Yuanrui Zhang
Cache topology aware computation mapping for multicores. PLDI (2010)
Mary Jane Irwin
Shared caches in multicores: the good, the bad, and the ugly. ISCA (2010)
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Sri Hari Krishna Narayanan
Compiler directed network-on-chip reliability enhancement for chip multiprocessors. LCTES (2010)
Chrysostomos Nicopoulos, Suresh Srinivasan, Aditya Yanamandra, Dongkook Park, Vijaykrishnan Narayanan, Chita R. Das, Mary Jane Irwin
On the Effects of Process Variation in Network-on-Chip Architectures. IEEE Trans. Dependable Secur. Comput. 7 (3) (2010)
Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin
T-NUCA - a novel approach to non-uniform access latency cache architectures for 3D CMPs. IPDPS Workshops (2010)
Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
Total Power Optimization for Combinational Logic Using Genetic Algorithms. J. Signal Process. Syst. 58 (2) (2010)
Madhu Mutyam, Feng Wang, Krishnan Ramakrishnan, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin
Process-Variation-Aware Adaptive Cache Architecture and Management. IEEE Trans. Computers 58 (7) (2009)
Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
Compiler-assisted soft error detection under performance and energy constraints in embedded systems. ACM Trans. Embed. Comput. Syst. 8 (4) (2009)
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
Using Data Compression for Increasing Memory System Utilization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (6) (2009)
Yuan Xie, Soumya Eachempati, Aditya Yanamandra, Vijaykrishnan Narayanan, Mary Jane Irwin
Power and area reduction using carbon nanotube bundle interconnect in global clock tree distribution network. NANOARCH (2009)
Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, Mary Jane Irwin
Arithmetic unit design using 180nm TSV-based 3D stacking technology. 3DIC (2009)
Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Padma Raghavan
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors. HiPEAC (2009)
Rajaraman Ramanarayanan, Vijay Degalahal, Krishnan Ramakrishnan, Jungsub Kim, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Kenan Unlu
Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits. IEEE Trans. Dependable Secur. Comput. 6 (3) (2009)
Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin
Adapting application execution in CMPs using helper threads. J. Parallel Distributed Comput. 69 (9) (2009)
Aditya Yanamandra, Mary Jane Irwin, Vijaykrishnan Narayanan, Mahmut T. Kandemir, Sri Hari Krishna Narayanan
In-Network Caching for Chip Multiprocessors. HiPEAC (2009)
Yuh-Fang Tsai, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
Design Space Exploration for 3-D Cache. IEEE Trans. Very Large Scale Integr. Syst. 16 (4) (2008)
Aditya Yanamandra, Bryan Cover, Padma Raghavan, Mary Jane Irwin, Mahmut T. Kandemir
Evaluating the role of scratchpad memories in chip multiprocessors for sparse matrix computations. IPDPS (2008)
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kandemir, Mustafa Karaköy, Mary Jane Irwin
Integrated code and data placement in two-dimensional mesh based chip multiprocessors. ICCAD (2008)
Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim
A low-power phase change memory based hybrid cache architecture. ACM Great Lakes Symposium on VLSI (2008)
Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin, Konrad Malkowski
Managing power, performance and reliability trade-offs. IPDPS (2008)
Yang Ding, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin
A helper thread based EDP reduction scheme for adapting application execution in CMPs. IPDPS (2008)
Mahmut T. Kandemir, Feihui Li, Mary Jane Irwin, Seung Woo Son
A novel migration-based NUCA design for chip multiprocessors. SC (2008)
Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin
Implementation and evaluation of a migration-based NUCA design for chip multiprocessors. SIGMETRICS (2008)
Shekhar Srikantaiah, Mahmut T. Kandemir, Mary Jane Irwin
Adaptive set pinning: managing shared caches in chip multiprocessors. ASPLOS (2008)
Suresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari
Toward Increasing FPGA Lifetime. IEEE Trans. Dependable Secur. Comput. 5 (2) (2008)
Krishnan Ramakrishnan, R. Rajaraman, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin, Kenan Unlu
Hierarchical Soft Error Estimation Tool (HSEET). ISQED (2008)
Niranjan Soundararajan, Aditya Yanamandra, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
Analysis and solutions to issue queue process variation. DSN (2008)
Sayaka Akioka, Feihui Li, Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin
Ring data location prediction scheme for Non-Uniform Cache Architectures. ICCD (2008)
Yuh-Fang Tsai, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin
Leakage-Aware Interconnect for On-Chip Network CoRR (2007)
Krishnan Ramakrishnan, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Mary Jane Irwin
Impact of NBTI on FPGAs. VLSI Design (2007)
Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
Memory Optimizations For Fast Power-Aware Sparse Computations. IPDPS (2007)
Andrew J. Ricketts, Madhu Mutyam, Narayanan Vijaykrishnan, Mary Jane Irwin
Investigating Simple Low Latency Reliable Multiported Register Files. ISVLSI (2007)
Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
Optimising power efficiency in trace cache fetch unit. IET Comput. Digit. Tech. 1 (4) (2007)
Konrad Malkowski, Padma Raghavan, Mahmut T. Kandemir, Mary Jane Irwin
Phase-aware adaptive hardware selection for power-efficient scientific computations. ISLPED (2007)
Konrad Malkowski, Greg M. Link, Padma Raghavan, Mary Jane Irwin
Load Miss Prediction - Exploiting Power Performance Trade-offs. IPDPS (2007)
S. Conner, Sayaka Akioka, Mary Jane Irwin, Padma Raghavan
Link Shutdown Opportunities During Collective Communications in 3-D Torus Nets. IPDPS (2007)
Sayaka Akioka, Feihui Li, Mahmut T. Kandemir, Padma Raghavan, Mary Jane Irwin
Ring Prediction for Non-Uniform Cache Architectures. PACT (2007)
Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
Reliability-aware Co-synthesis for Embedded Systems. J. VLSI Signal Process. 49 (1) (2007)
Krishnan Ramakrishnan, R. Rajaraman, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
Variation Impact on SER of Combinational Circuits. ISQED (2007)
Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
Architecting Microprocessor Components in 3D Design Space. VLSI Design (2007)
Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
Thermal-Aware Task Allocation and Scheduling for Embedded Systems CoRR (2007)
Ronald F. Boisvert, Mary Jane Irwin, Holly E. Rushmeier
Evolving the ACM journal distribution program. Commun. ACM 50 (9) (2007)
Feng Wang, Michael DeBole, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
On-chip bus thermal analysis and optimisation. IET Comput. Digit. Tech. 1 (5) (2007)
Amol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
Variation Analysis of CAM Cells. ISQED (2007)
Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin
Reducing non-deterministic loads in low-power caches via early cache set resolution. Microprocess. Microsystems 31 (5) (2007)
Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin
A Parallel Architecture for Hardware Face Detection. ISVLSI (2006)
Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemir, Mary Jane Irwin
Enhancing L2 organization for CMPs with a center cell. IPDPS (2006)
Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin
Conjugate gradient sparse solvers: performance-power characteristics. IPDPS (2006)
Guilin Chen, Mahmut T. Kandemir, Mary Jane Irwin, J. Ramanujam
Reducing code size through address register assignment. ACM Trans. Embed. Comput. Syst. 5 (1) (2006)
Mahmut T. Kandemir, Guangyu Chen, Feihui Li, Mary Jane Irwin, Ibrahim Kolcu
Activity clustering for leakage management in SPMs. DATE (2006)
Madhu Mutyam, Feihui Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
Compiler-directed thermal management for VLIW functional units. LCTES (2006)
Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
Object duplication for improving reliability. ASP-DAC (2006)
Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties. IEEE Trans. Circuits Syst. Video Technol. 16 (5) (2006)
Wei Zhang, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
Reducing dynamic and leakage energy in VLIW architectures. ACM Trans. Embed. Comput. Syst. 5 (1) (2006)
Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
On-chip bus thermal analysis and optimization. DATE (2006)
Guangyu Chen, Feihui Li, Mahmut T. Kandemir, Mary Jane Irwin
Reducing NoC energy consumption through compiler-directed channel voltage scaling. PLDI (2006)
Sayaka Akioka, Konrad Malkowski, Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris
Characterizing the Performance and Energy Attributes of Scientific Simulations. International Conference on Computational Science (1) (2006)
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin, Suleyman Tosun
Multi-Level On-Chip Memory Hierarchy Design for Embedded Chip Multiprocessors. ICPADS (1) (2006)
Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
An efficient architecture for motion estimation and compensation in the transform domain. IEEE Trans. Circuits Syst. Video Technol. 16 (2) (2006)
Ronald F. Boisvert, Mary Jane Irwin
Plagiarism on the rise. Commun. ACM 49 (6) (2006)
Konrad Malkowski, Padma Raghavan, Mary Jane Irwin
Poster reception - Toward a power efficient computer architecture for Barnes-Hut N-body simulations. SC (2006)
Andrew J. Ricketts, Kevin M. Irick, Narayanan Vijaykrishnan, Mary Jane Irwin
Priority scheduling in digital microfluidics-based biochips. DATE (2006)
Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin
On improving performance and energy profiles of sparse scientific applications. IPDPS (2006)
R. Rajaraman, Jungsub Kim, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic. VLSI Design (2006)
Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED (2006)
S. Conner, Greg M. Link, S. Tobita, Mary Jane Irwin, Padma Raghavan
Poster reception - Energy/performance modeling for collective communication in 3-D torus cluster networks. SC (2006)
Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli
Block-based frequency scalable technique for efficient hierarchical coding. IEEE Trans. Signal Process. 54 (7) (2006)
Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
Designing reliable circuit in the presence of soft errors. ASP-DAC (2005)
Ozcan Ozturk, Mahmut T. Kandemir, G. Chen, Mary Jane Irwin, Mustafa Karaköy
Customized on-chip memories for embedded chip multiprocessors. ASP-DAC (2005)
Guiling Wang, Mary Jane Irwin, Piotr Berman, Haoying Fu, Thomas F. La Porta
Optimizing sensor movement planning for energy efficiency. ISLPED (2005)
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin
BB-GC: Basic-Block Level Garbage Collection. DATE (2005)
Padma Raghavan, Mary Jane Irwin, Lois C. McInnes, Boyana Norris
Adaptive Software for Scientific Computing: Co-Managing Quality-Performance-Power Tradeoffs. IPDPS (2005)
Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
Leakage-Aware Interconnect for On-Chip Network. DATE (2005)
Mahmut T. Kandemir, Mary Jane Irwin, Guangyu Chen, Ibrahim Kolcu
Compiler-guided leakage optimization for banked scratch-pad memories. IEEE Trans. Very Large Scale Integr. Syst. 13 (10) (2005)
Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
Compiler-Directed Instruction Duplication for Soft Error Detection. DATE (2005)

Mary Jane Irwin.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Mary Jane Irwin