Chrysostomos Nicopoulos

ORCID

Publication Activity (10 Years)

Years Active: 2005-2024
Publications (10 Years): 52

Top Venues

DATE

CoRR

IEEE Trans. Very Large Scale Integr. Syst.

MOCAST

Publications

Christodoulos Peltekis, Vasileios Titopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity. CoRR (2024)
Vasileios Titopoulos, K. Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications. DATE (2024)
Christodoulos Peltekis, Vasileios Titopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity. IEEE Comput. Archit. Lett. 23 (1) (2024)
Giorgos Dimitrakopoulos, E. Kallitsounakis, Z. Takakis, A. Stefanidis, Chrysostomos Nicopoulos
Multi-Armed Bandits for Autonomous Test Application in RISC-V Processor Verification. MOCAST (2023)
Dionysios Filippas, Christodoulos Peltekis, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines. AICAS (2023)
Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Streaming Dilated Convolution Engine. IEEE Trans. Very Large Scale Integr. Syst. 31 (3) (2023)
Dionysios Filippas, Christodoulos Peltekis, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
Reduced-Precision Floating-Point Arithmetic in Systolic Arrays with Skewed Pipelines. CoRR (2023)
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating. CoRR (2023)
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
Exploiting data encoding and reordering for low-power streaming in systolic arrays. Microprocess. Microsystems 102 (2023)
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating. MOCAST (2023)
V. Titopoulos, K. Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications. CoRR (2023)
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos, Dionisios N. Pnevmatikatos
ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining. DATE (2023)
Andreas G. Savva, Theocharis Theocharides, Chrysostomos Nicopoulos
Robustness of Artificial Neural Networks Based on Weight Alterations Used for Prediction Purposes. Algorithms 16 (7) (2023)
Mandrita Banerjee, Carlo Borges, Kim-Kwang Raymond Choo, Junghee Lee, Chrysostomos Nicopoulos
A Hardware-Assisted Heartbeat Mechanism for Fault Identification in Large-Scale IoT Systems. IEEE Trans. Dependable Secur. Comput. 19 (2) (2022)
Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
LeapConv: An Energy-Efficient Streaming Convolution Engine with Reconfigurable Stride. ISVLSI (2022)
Yiannakis Sazeides, Alex Gerber, Ron Gabor, Arkady Bramnik, George Papadimitriou, Dimitris Gizopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Karyofyllis Patsidis
IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming. MICRO (2022)
Giorgos Dimitrakopoulos, Anastasios Psarras, Chrysostomos Nicopoulos
Virtual-Channel Flow Control Across Mesochronous Clock Domains. MOCAST (2022)
Christodoulos Peltekis, Dionysios Filippas, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
FusedGCN: A Systolic Three-Matrix Multiplication Architecture for Graph Convolutional Networks. ASAP (2022)
Dionysios Filippas, Nikolaos Margomenos, Nikolaos Mitianoudis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Low-Cost Online Convolution Checksum Checker. IEEE Trans. Very Large Scale Integr. Syst. 30 (2) (2022)
Christodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos, Dionisios N. Pnevmatikatos
ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining. CoRR (2022)
Dimitris Konstantinou, Chrysostomos Nicopoulos, Junghee Lee, Giorgos Dimitrakopoulos
Multicast-enabled network-on-chip routers leveraging partitioned allocation and switching. Integr. 77 (2021)
Apostolos Stefanidis, Dimitrios Mangiras, Chrysostomos Nicopoulos, David G. Chinnery, Giorgos Dimitrakopoulos
Autonomous Application of Netlist Transformations Inside Lagrangian Relaxation-Based Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (8) (2021)
Yiannakis Sazeides, Arkady Bramnik, Ron Gabor, Chrysostomos Nicopoulos, Ramon Canal, Dimitris Konstantinou, Giorgos Dimitrakopoulos
2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD). DFT (2020)
Karyofyllis Patsidis, Chrysostomos Nicopoulos, Georgios Ch. Sirakoulis, Giorgos Dimitrakopoulos
RISC-V2: A Scalable RISC-V Vector Processor. ISCAS (2020)
Dimitrios Konstantinou, Chrysostomos Nicopoulos, Junghee Lee, Georgios Ch. Sirakoulis, Giorgos Dimitrakopoulos
SmartFork: Partitioned Multicast Allocation and Switching in Network-on-Chip Routers. ISCAS (2020)
Apostolos Stefanidis, Dimitrios Mangiras, Chrysostomos Nicopoulos, David G. Chinnery, Giorgos Dimitrakopoulos
Design Optimization by Fine-grained Interleaving of Local Netlist Transformations in Lagrangian Relaxation. ISPD (2020)
Dimitrios Konstantinou, Anastasios Psarras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
The Mesochronous Dual-Clock FIFO Buffer. IEEE Trans. Very Large Scale Integr. Syst. 28 (1) (2020)
Junghee Lee, Chrysostomos Nicopoulos, Gweonho Jeong, Jihye Kim, Hyunok Oh
Practical Verifiable Computation by Using a Hardware-Based Correct Execution Environment. IEEE Access 8 (2020)
Dimitrios Mangiras, Apostolos Stefanidis, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Timing-Driven Placement Optimization Facilitated by Timing-Compatibility Flip-Flop Clustering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Ron Gabor, Yiannakis Sazeides, Arkady Bramnik, Alexandros Andreou, Chrysostomos Nicopoulos, Karyofyllis Patsidis, Dimitris Konstantinou, Giorgos Dimitrakopoulos
Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core. DATE (2019)
Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Automatic Generation of Peak-Power Traffic for Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (1) (2019)
Apostolos Stefanidis, Dimitrios Mangiras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Multi-Armed Bandits for Autonomous Timing-driven Design Optimization. PATMOS (2019)
Zacharias Takakis, Dimitrios Mangiras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Dynamic Adjustment of Test-Sequence Duration for Increasing the Functional Coverage. IVSW (2019)
Michail Noltsis, Panayiotis Englezakis, Eleni Maragkoudaki, Chrysostomos Nicopoulos, Dimitrios Rodopoulos, Francky Catthoor, Yiannakis Sazeides, Davide Zoni, Dimitrios Soudris
Fast Estimations of Failure Probability Over Long Time Spans. NANOARCH (2018)
Dimitris Konstantinou, Anastasios Psarras, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
Low-power dual-edge-triggered synchronous latency-insensitive systems. MOCAST (2018)
Karyofyllis Patsidis, Dimitris Konstantinou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension. Microprocess. Microsystems 61 (2018)
Junghee Lee, Monobrata Debnath, Amit Patki, Mostafa Hasan, Chrysostomos Nicopoulos
Hardware-Based Online Self-Diagnosis for Faulty Device Identification in Large-Scale IoT Systems. IoTDI (2018)
Nikolaos Zompakis, Michail Noltsis, Lorena Ndreu, Zacharias Hadjilambrou, Panayiotis Englezakis, Panagiota Nikolaou, Antoni Portero, Simone Libutti, Giuseppe Massari, Federico Sassi, Alessandro Bacchini, Chrysostomos Nicopoulos, Yiannakis Sazeides, Radim Vavrík, Martin Golasowski, Jiri Sevcík, Vít Vondrák, Francky Catthoor, William Fornaciari, Dimitrios Soudris
HARPA: Tackling physically induced performance variability. DATE (2017)
Jaehyun Park, Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Vinson Young, Junghee Lee, Jongman Kim
HoPE: Hot-Cacheline Prediction for Dynamic Early Decompression in Compressed LLCs. ACM Trans. Design Autom. Electr. Syst. 22 (3) (2017)
Anastasios Psarras, Michalis Paschou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
A Dual-Clock Multiple-Queue Shared Buffer. IEEE Trans. Computers 66 (10) (2017)
Andreas G. Savva, Theocharis Theocharides, Chrysostomos Nicopoulos
A Design Space Exploration Framework for ANN-Based Fault Detection in Hardware Systems. J. Electr. Comput. Eng. 2017 (2017)
Monobrata Debnath, Dimitris Konstantinou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Wei-Ming Lin, Junghee Lee
Low-cost congestion management in networks-on-chip using edge and in-network traffic throttling. AISTECS@HiPEAC (2017)
Anastasios Psarras, Savvas Moisidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Networks-on-Chip With Double-Data-Rate Links. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2017)
Davide Zoni, Andrea Canidio, William Fornaciari, Panayiotis Englezakis, Chrysostomos Nicopoulos, Yiannakis Sazeides
BlackOut: Enabling fine-grained power gating of buffers in Network-on-Chip routers. J. Parallel Distributed Comput. 104 (2017)
Kypros Chrysanthou, Panayiotis Englezakis, Andreas Prodromou, Andreas Panteli, Chrysostomos Nicopoulos, Yiannakis Sazeides, Giorgos Dimitrakopoulos
An Online and Real-Time Fault Detection and Localization Mechanism for Network-on-Chip Architectures. ACM Trans. Archit. Code Optim. 13 (2) (2016)
Michalis Paschou, Anastasios Psarras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
CrossOver: Clock domain crossing under virtual-channel flow control. DATE (2016)
Anastasios Psarras, Junghee Lee, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
PhaseNoC: Versatile Network Traffic Isolation Through TDM-Scheduled Virtual Channels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (5) (2016)
Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Powermax: an automated methodology for generating peak-power traffic in networks-on-chip. NOCS (2016)
Marios Kleanthous, Yiannakis Sazeides, Emre Özer, Chrysostomos Nicopoulos, Panagiota Nikolaou, Zacharias Hadjilambrou
Toward Multi-Layer Holistic Evaluation of System Designs. IEEE Comput. Archit. Lett. 15 (1) (2016)
Anastasios Psarras, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
ShortPath: A Network-on-Chip Router with Fine-Grained Pipeline Bypassing. IEEE Trans. Computers 65 (10) (2016)
Anastasios Psarras, Savvas Moisidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
RapidLink: A network-on-chip architecture with double-data-rate links. ICECS (2016)
Anastasios Psarras, Junghee Lee, Pavlos M. Mattheakis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors. ACM Great Lakes Symposium on VLSI (2016)
Ioannis Seitanidis, Anastasios Psarras, Kypros Chrysanthou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
ElastiStore: Flexible Elastic Buffering for Virtual-Channel-Based Networks on Chip. IEEE Trans. Very Large Scale Integr. Syst. 23 (12) (2015)
Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Junghee Lee, Jongman Kim
Size-Aware Cache Management for Compressed Cache Architectures. IEEE Trans. Computers 64 (8) (2015)
Anastasios Psarras, I. Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
PhaseNoC: TDM scheduling at the virtual-channel level for efficient network traffic isolation. DATE (2015)
Suk Chan Kang, Chrysostomos Nicopoulos, Ada Gavrilovska, Jongman Kim
Subtleties of Run-Time VirtualAddress Stacks. IEEE Comput. Archit. Lett. 14 (2) (2015)
Dimitrios Rodopoulos, Simone Corbetta, Giuseppe Massari, Simone Libutti, Francky Catthoor, Yiannakis Sazeides, Chrysostomos Nicopoulos, Antoni Portero, Etienne Cappe, Radim Vavrík, Vít Vondrák, Dimitrios Soudris, Federico Sassi, Agnes Fritsch, William Fornaciari
HARPA: Solutions for dependable performance under physically induced performance variability. SAMOS (2015)
Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael
Toward efficient check-pointing and rollback under on-demand SBST in chip multi-processors. IOLTS (2015)
Alexandros Panteloukas, Anastasios Psarras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Timing-resilient Network-on-Chip architectures. IOLTS (2015)
Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael
Exploration of system availability during software-based self-testing in many-core systems under test latency constraints. DFT (2014)
Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Jongman Kim
Centaur: a hybrid network-on-chip architecture utilizing micro-network fusion. Des. Autom. Embed. Syst. 18 (3-4) (2014)
I. Seitanidis, Anastasios Psarras, Emmanouil Kalligeros, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
ElastiNoC: A self-testable distributed VC-based Network-on-Chip architecture. NOCS (2014)
I. Seitanidis, Anastasios Psarras, Giorgos Dimitrakopoulos, Chrysostomos Nicopoulos
ElastiStore: An elastic buffer architecture for Network-on-Chip routers. DATE (2014)
Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Jongman Kim
Designing Hybrid DRAM/PCM Main Memory Systems Utilizing Dual-Phase Compression. ACM Trans. Design Autom. Electr. Syst. 20 (1) (2014)
Junghee Lee, Chrysostomos Nicopoulos, Gi-Hwan Oh, Sang-Won Lee, Jongman Kim
Hardware-Assisted Intrusion Detection by Preserving Reference Information Integrity. ICA3PP (1) (2013)
Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Junghee Lee, Jongman Kim
ECM: Effective Capacity Maximizer for high-performance compressed caching. HPCA (2013)
Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Shreepad Panth, Sung Kyu Lim, Jongman Kim
IsoNet: Hardware-Based Job Queue Management for Many-Core Architectures. IEEE Trans. Very Large Scale Integr. Syst. 21 (6) (2013)
Giorgos Dimitrakopoulos, N. Georgiadis, Chrysostomos Nicopoulos, Emmanouil Kalligeros
Switch folding: network-on-chip routers with time-multiplexed output ports. DATE (2013)
Arseniy Vitkovskiy, Vassos Soteriou, Chrysostomos Nicopoulos
Dynamic fault-tolerant routing algorithm for networks-on-chip based on localised detouring paths. IET Comput. Digit. Tech. 7 (2) (2013)
Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Jongman Kim
Sharded Router: A novel on-chip router architecture employing bandwidth sharding and stealing. Parallel Comput. 39 (9) (2013)
Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael
DaemonGuard: O/S-assisted selective software-based Self-Testing for multi-core systems. DFTS (2013)
Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Jongman Kim
TornadoNoC: A lightweight and scalable on-chip network architecture for the many-core era. ACM Trans. Archit. Code Optim. 10 (4) (2013)
Junghee Lee, Chrysostomos Nicopoulos, Sung Joo Park, Madhavan Swaminathan, Jongman Kim
Do we need wide flits in Networks-on-Chip? ISVLSI (2013)
Hyung Gyu Lee, Seungcheol Baek, Jongman Kim, Chrysostomos Nicopoulos
A Compression-Based Hybrid MLC/SLC Management Technique for Phase-Change Memory Systems. ISVLSI (2012)
Arseniy Vitkovskiy, Vassos Soteriou, Chrysostomos Nicopoulos
A highly robust distributed fault-tolerant routing algorithm for NoCs with localized rerouting. INA-OCMC@HiPEAC (2012)
Marios Evripidou, Chrysostomos Nicopoulos, Vassos Soteriou, Jongman Kim
Virtualizing Virtual Channels for Increased Network-on-Chip Robustness and Upgradeability. ISVLSI (2012)
Junghee Lee, Hyung Gyu Lee, Soonhoi Ha, Jongman Kim, Chrysostomos Nicopoulos
A programmable processing array architecture supporting dynamic task scheduling and module-level prefetching. Conf. Computing Frontiers (2012)
Boris Grot, Damien Hardy, Pejman Lotfi-Kamran, Babak Falsafi, Chrysostomos Nicopoulos, Yiannakis Sazeides
Optimizing Data-Center TCO with Scale-Out Processors. IEEE Micro 32 (5) (2012)
Arseniy Vitkovskiy, Vassos Soteriou, Chrysostomos Nicopoulos
A Dynamically Adjusting Gracefully Degrading Link-Level Fault-Tolerant Mechanism for NoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (8) (2012)
Andreas Prodromou, Andreas Panteli, Chrysostomos Nicopoulos, Yiannakis Sazeides
NoCAlert: An On-Line and Real-Time Fault Detection Mechanism for Network-on-Chip Architectures. MICRO (2012)
Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Jongman Kim
A dual-phase compression mechanism for hybrid DRAM/PCM main memory architectures. ACM Great Lakes Symposium on VLSI (2012)
Dragomir Milojevic, Sachin Idgunji, Djordje Jevdjic, Emre Özer, Pejman Lotfi-Kamran, Andreas Panteli, Andreas Prodromou, Chrysostomos Nicopoulos, Damien Hardy, Babak Falsafi, Yiannakis Sazeides
Thermal characterization of cloud workloads on a power-efficient server-on-chip. ICCD (2012)
Hyung Gyu Lee, Seungcheol Baek, Chrysostomos Nicopoulos, Jongman Kim
An energy- and performance-aware DRAM cache architecture for hybrid DRAM/PCM main memory systems. ICCD (2011)
Junghee Lee, Chrysostomos Nicopoulos, Yongjae Lee, Hyung Gyu Lee, Jongman Kim
Hardware-Based Job Queue Management for Manycore Architectures and OpenMP Environments. IPDPS (2011)
Mamadou Diao, Chrysostomos Nicopoulos, Jongman Kim
Large-Scale Semantic Concept Detection on Manycore Platforms for Multimedia Mining. IPDPS (2011)
Feng Wang, Yibo Chen, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan
Variation-Aware Task and Communication Mapping for MPSoC Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (2) (2011)
Suk Chan Kang, Chrysostomos Nicopoulos, Hyung Gyu Lee, Jongman Kim
A High-Performance and Energy-Efficient Virtually Tagged Stack Cache Architecture for Multi-core Environments. HPCC (2011)
Arseniy Vitkovskiy, Vassos Soteriou, Chrysostomos Nicopoulos
A fine-grained link-level fault-tolerant mechanism for networks-on-chip. ICCD (2010)
Chrysostomos Nicopoulos, Suresh Srinivasan, Aditya Yanamandra, Dongkook Park, Vijaykrishnan Narayanan, Chita R. Das, Mary Jane Irwin
On the Effects of Process Variation in Network-on-Chip Architectures. IEEE Trans. Dependable Secur. Comput. 7 (3) (2010)
Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Seyed-Hosein Attarzadeh-Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne
Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 2 (2) (2009)
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan, Ravishankar R. Iyer, Mazin S. Yousif, Chita R. Das
Performance and power optimization through data compression in Network-on-Chip architectures. HPCA (2008)
Seyed-Hosein Attarzadeh-Niaki, Alessandro Cevrero, Philip Brisk, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne
Design space exploration for field programmable compressor trees. CASES (2008)
Niranjan Soundararajan, Aditya Yanamandra, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
Analysis and solutions to issue queue process variation. DSN (2008)
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das
A novel dimensionally-decomposed router for on-chip communication in 3D architectures. ISCA (2007)
Dongkook Park, Reetuparna Das, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Ravishankar R. Iyer, Chita R. Das
Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip Interconnects. Hot Interconnects (2007)
Feng Wang, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan
Variation-aware task allocation and scheduling for MPSoC. ICCAD (2007)
Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Chita R. Das
Exploring Fault-Tolerant Network-on-Chip Architectures. DSN (2006)
Thomas D. Richardson, Chrysostomos Nicopoulos, Dongkook Park, Narayanan Vijaykrishnan, Yuan Xie, Chita R. Das, Vijay Degalahal
A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks. VLSI Design (2006)
Feihui Li, Chrysostomos Nicopoulos, Thomas D. Richardson, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. ISCA (2006)
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Vijaykrishnan Narayanan, Mazin S. Yousif, Chita R. Das
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks. ISCA (2006)

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Publication Activity (10 Years)

Top Topics

Top Venues

Chrysostomos Nicopoulos