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ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining.

Christodoulos PeltekisDionysios FilippasGiorgos DimitrakopoulosChrysostomos NicopoulosDionisios N. Pnevmatikatos
Published in: DATE (2023)
Keyphrases
  • systolic array
  • parallel architecture
  • reconfigurable architecture
  • data flow
  • parallel processing
  • real time
  • image processing
  • hardware implementation
  • genetic algorithm
  • case study
  • np hard
  • design considerations