Philip Brisk

ORCID

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 52

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

ACM J. Emerg. Technol. Comput. Syst.

FCCM

ACM Trans. Embed. Comput. Syst.

Publications

Shane Hoang, Mabel Shehada, Zinal Patel, Minh-Huy Tran, Konstantinos Karydis, Philip Brisk, William H. Grover
Error detection using pneumatic logic. CoRR (2024)
Tyson Loveless, Philip Brisk
Compiling Functions onto Digital Microfluidics. CGO (2023)
Prithviraj Yuvaraj, Amin Akalantar, Eamonn J. Keogh, Philip Brisk
Feature Extraction Accelerator for Streaming Time Series. FCCM (2023)
Amin Kalantar, Zachary Zimmerman, Philip Brisk
FPGA-based Acceleration of Time Series Similarity Prediction: From Cloud to Edge. ACM Trans. Reconfigurable Technol. Syst. 16 (1) (2023)
Maryam Shahcheraghi, Trevor Cappon, Samet Oymak, Evangelos E. Papalexakis, Eamonn J. Keogh, Zachary Zimmerman, Philip Brisk
Matrix Profile Index Approximation for Streaming Time Series. IEEE BigData (2021)
Tyson Loveless, Jason Ott, Philip Brisk
Time- and resource-constrained scheduling for digital microfluidic biochips. ICCPS (2021)
Brian Crites, Cody Falzone, Tristan Lopez, Karen Kong, Philip Brisk
Reducing Microfluidic Very Large-Scale Integration (mVLSI) Chip Area by Seam Carving. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (10) (2021)
Amin Kalantar, Zachary Zimmerman, Philip Brisk
FA-LAMP: FPGA-Accelerated Learned Approximate Matrix Profile for Time Series Similarity Prediction. FCCM (2021)
Jason Ott, Tyson Loveless, Christopher Curtis, Mohsen Lesani, Philip Brisk
BioScript: programming safe chemistry on laboratories-on-a-chip. Commun. ACM 64 (2) (2021)
Joshua Potter, William H. Grover, Philip Brisk
Dynamic Radial Placement and Routing in Paper Microfluidics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (10) (2021)
Tyson Loveless, Jason Ott, Philip Brisk
A performance-optimizing compiler for cyber-physical digital microfluidic biochips. CGO (2020)
Brian Crites, Karen Kong, Philip Brisk
Directed Placement for mVLSI Devices. ACM J. Emerg. Technol. Comput. Syst. 16 (2) (2020)
Frédéric Gessler, Philip Brisk, Mirjana Stojilovic
A Shared-Memory Parallel Implementation of the RePlAce Global Cell Placer. VLSI Design (2020)
Sina Faezi, Sujit Rokka Chhetri, Arnav Vaibhav Malawade, John Charles Chaput, William H. Grover, Philip Brisk, Mohammad Abdullah Al Faruque
Acoustic Side Channel Attack Against DNA Synthesis Machines: Poster Abstract. ICCPS (2020)
Jason Ott, Daniel Tan, Tyson Loveless, William H. Grover, Philip Brisk
ChemStor: Using Formal Methods To Guarantee Safe Storage and Disposal of Chemicals. J. Chem. Inf. Model. 60 (7) (2020)
Hugo Brunie, Costin Iancu, Khaled Z. Ibrahim, Philip Brisk, Brandon Cook
Tuning floating-point precision using dynamic program information and temporal locality. SC (2020)
Kaveh Kamgar, Eamonn J. Keogh, Zachary Zimmerman, Nader Shakibay Senobari, Gareth J. Funning, Brian Crites, Philip Brisk
Matrix Profile XIV: Scaling Time Series Motif Discovery with GPUs to Break a Quintillion Pairwise Comparisons a Day and Beyond. SoCC (2019)
Philip Brisk, Suman Chakraborty, Claudionor Coelho, Abdoulaye Gamatié, Swaroop Ghosh, Xun Jiao
TCAD EIC Message: February 2019. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (2) (2019)
Sina Boroumand, Philip Brisk
Approximate Adder Tree Synthesis for FPGAs. ReConFig (2019)
Kenneth O'Neal, Philip Brisk, Emily Shriver, Michael Kishinevsky
Hardware-Assisted Cross-Generation Prediction of GPUs Under Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (6) (2019)
Sina Faezi, Sujit Rokka Chhetri, Arnav Vaibhav Malawade, John Charles Chaput, William H. Grover, Philip Brisk, Mohammad Abdullah Al Faruque
Oligo-Snoop: A Non-Invasive Side Channel Attack Against DNA Synthesis Machines. NDSS (2019)
Zachary Zimmerman, Nader Shakibay Senobari, Gareth J. Funning, Evangelos E. Papalexakis, Samet Oymak, Philip Brisk, Eamonn J. Keogh
Matrix Profile XVIII: Time Series Mining in the Face of Fast Moving Streams using a Learned Approximate Matrix Profile. ICDM (2019)
Radhakrishna Sanka, Brian Crites, Jeffrey McDaniel, Philip Brisk, Douglas Densmore
Specification, Integration, and Benchmarking of Continuous Flow Microfluidic Devices: Invited Paper. ICCAD (2019)
Zachary Zimmerman, Kaveh Kamgar, Nader Shakibay Senobari, Brian Crites, Gareth J. Funning, Philip Brisk, Eamonn J. Keogh
Matrix Profile XIV: Scaling Time Series Motif Discovery with GPUs to Break a Quintillion Pairwise Comparisons a Day and Beyond. SoCC (2019)
Yan Zhu, Zachary Zimmerman, Nader Shakibay Senobari, Chin-Chia Michael Yeh, Gareth J. Funning, Abdullah Mueen, Philip Brisk, Eamonn J. Keogh
Exploiting a novel algorithm and GPUs to break the ten quadrillion pairwise comparisons barrier for time series motifs and joins. Knowl. Inf. Syst. 54 (1) (2018)
Brian Crites, Radhakrishna Sanka, Joshua Lippai, Jeffrey McDaniel, Philip Brisk, Douglas Densmore
ParchMint: A Microfluidics Benchmark Suite. IISWC (2018)
Christopher Curtis, Daniel T. Grissom, Philip Brisk
A compiler for cyber-physical digital microfluidic biochips. CGO (2018)
Kenneth O'Neal, Philip Brisk
Predictive Modeling for CPU, GPU, and FPGA Performance and Power Consumption: A Survey. ISVLSI (2018)
Yehdhih Ould Mohammed Moctar, Mirjana Stojilovic, Philip Brisk
Deterministic Parallel Routing for FPGAs Based on Galois Parallel Execution Model. FPL (2018)
Kenneth O'Neal, Daniel T. Grissom, Philip Brisk
Resource-Constrained Scheduling for Digital Microfluidic Biochips. ACM J. Emerg. Technol. Comput. Syst. 14 (1) (2018)
Alireza Abdoli, Philip Brisk
Stationary-Mixing Field-Programmable Pin-Constrained Digital Microfluidic Biochip. Microelectron. J. 77 (2018)
Wajid Hassan Minhass, Jeffrey McDaniel, Michael Lander Raagaard, Philip Brisk, Paul Pop, Jan Madsen
Scheduling and Fluid Routing for Flow-Based Microfluidic Laboratories-on-a-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (3) (2018)
Sina Boroumand, Hadi Parandeh-Afshar, Philip Brisk, Siamak Mohammadi
Exploration of approximate multipliers design space using carry propagation free compressors. ASP-DAC (2018)
Junchao Wang, Lingxuan Fu, Liyang Yu, Xiwei Huang, Philip Brisk, William H. Grover
Accelerating Simulation of Particle Trajectories in Microfluidic Devices by Constructing a Cloud Database. ISVLSI (2018)
Kenneth O'Neal, Mitch Liu, Hans Tang, Amin Kalantar, Kennen DeRenard, Philip Brisk
HLSPredict: cross platform performance prediction for FPGA high-level synthesis. ICCAD (2018)
Sina Boroumand, Hadi Parandeh-Afshar, Philip Brisk
Approximate quaternary addition with the fast carry chains of FPGAs. DATE (2018)
Jason Ott, Tyson Loveless, Christopher Curtis, Mohsen Lesani, Philip Brisk
BioScript: programming safe chemistry on laboratories-on-a-chip. Proc. ACM Program. Lang. 2 (OOPSLA) (2018)
Jeffrey McDaniel, Zachary Zimmerman, Daniel T. Grissom, Philip Brisk
PCB Escape Routing and Layer Minimization for Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (1) (2017)
Brian Crites, Karen Kong, Philip Brisk
Diagonal Component Expansion for Flow-Layer Placement of Flow-Based Microfluidic Biochips. ACM Trans. Embed. Comput. Syst. 16 (5s) (2017)
Skyler Windh, Calvin Phung, Daniel T. Grissom, Paul Pop, Philip Brisk
Performance Improvements and Congestion Reduction for Routing-Based Synthesis for Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (1) (2017)
Lana Josipovic, Philip Brisk, Paolo Ienne
From C to elastic circuits. ACSSC (2017)
Sina Boroumand, Hadi Parandeh-Afshar, Philip Brisk, Siamak Mohammadi
CAL: Exploring cost, accuracy, and latency in approximate and speculative adder design. DFT (2017)
Brian Crites, Karen Kong, Philip Brisk
Reducing Microfluidic Very Large Scale Integration (mVLSI) Chip Area by Seam Carving. ACM Great Lakes Symposium on VLSI (2017)
Kenneth O'Neal, Philip Brisk, Emily Shriver, Michael Kishinevsky
HALWPE: Hardware-Assisted Light Weight Performance Estimation for GPUs. DAC (2017)
Jeffrey McDaniel, William H. Grover, Philip Brisk
The case for semi-automated design of microfluidic very large scale integration (mVLSI) chips. DATE (2017)
Lana Josipovic, Philip Brisk, Paolo Ienne
An Out-of-Order Load-Store Queue for Spatial Computing. FCCM (2017)
Lana Josipovic, Philip Brisk, Paolo Ienne
An Out-of-Order Load-Store Queue for Spatial Computing. ACM Trans. Embed. Comput. Syst. 16 (5s) (2017)
Kenneth O'Neal, Philip Brisk, Ahmed Abousamra, Zack Waters, Emily Shriver
GPU Performance Estimation using Software Rasterization and Machine Learning. ACM Trans. Embed. Comput. Syst. 16 (5s) (2017)
Andrew Becker, Wei Hu, Yu Tai, Philip Brisk, Ryan Kastner, Paolo Ienne
Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking. DAC (2017)
Joshua Potter, William H. Grover, Philip Brisk
Design Automation for Paper Microfluidics with Passive Flow Substrates. ACM Great Lakes Symposium on VLSI (2017)
Yan Zhu, Zachary Zimmerman, Nader Shakibay Senobari, Chin-Chia Michael Yeh, Gareth J. Funning, Abdullah Mueen, Philip Brisk, Eamonn J. Keogh
Matrix Profile II: Exploiting a Novel Algorithm and GPUs to Break the One Hundred Million Barrier for Time Series Motifs and Joins. ICDM (2016)
Paolo Ienne, Walid A. Najjar, Jason Helge Anderson, Philip Brisk, Walter Stechele
Preface. FPL (2016)
Daniel T. Grissom, Christopher Curtis, Skyler Windh, Calvin Phung, Navin Kumar, Zachary Zimmerman, Kenneth O'Neal, Jeffrey McDaniel, Nick Liao, Philip Brisk
An open-source compiler and PCB synthesis tool for digital microfluidic biochips. Integr. 51 (2015)
Christopher Jaress, Philip Brisk, Daniel T. Grissom
Rapid online fault recovery for cyber-physical digital microfluidic biochips. VTS (2015)
Yehdhih Ould Mohammed Moctar, Guy G. F. Lemieux, Philip Brisk
Fast and Memory-Efficient Routing Algorithms for Field Programmable Gate Arrays With Sparse Intracluster Routing Crossbars. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (12) (2015)
Bailey Miller, Frank Vahid, Tony Givargis, Philip Brisk
Graph-Based Approaches to Placement of Processing Element Networks on FPGAs for Physical Model Simulation. ACM Trans. Reconfigurable Technol. Syst. 7 (4) (2015)
Jeffrey McDaniel, Brian Crites, Philip Brisk, William H. Grover
Flow-Layer Physical Design for Microchips Based on Monolithic Membrane Valves. IEEE Des. Test 32 (6) (2015)
Ali Galip Bayrak, Francesco Regazzoni, David Novo, Philip Brisk, François-Xavier Standaert, Paolo Ienne
Automatic Application of Power Analysis Countermeasures. IEEE Trans. Computers 64 (2) (2015)
Yehdhih Ould Mohammed Moctar, Philip Brisk
Parallel FPGA Routing based on the Operator Formulation. DAC (2014)
Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne
Way Stealing: A Unified Data Cache and Architecturally Visible Storage for Instruction Set Extensions. IEEE Trans. Very Large Scale Integr. Syst. 22 (1) (2014)
Daniel T. Grissom, Jeffrey McDaniel, Philip Brisk
A Low-Cost Field-Programmable Pin-Constrained Digital Microfluidic Biochip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (11) (2014)
Jeffrey McDaniel, Brendon Parker, Philip Brisk
Simulated annealing-based placement for microfluidic large scale integration (mLSI) chips. VLSI-SoC (2014)
Johnathan Fiske, Daniel T. Grissom, Philip Brisk
Exploring speed and energy tradeoffs in droplet transport for digital microfluidic biochips. ASP-DAC (2014)
Daniel T. Grissom, Christopher Curtis, Philip Brisk
Interpreting Assays with Control Flow on Digital Microfluidic Biochips. ACM J. Emerg. Technol. Comput. Syst. 10 (3) (2014)
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo Charbon, Paolo Ienne
Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage. ACM Trans. Archit. Code Optim. 11 (2) (2014)
Daniel T. Grissom, Jeffrey McDaniel, Philip Brisk
Performance and cost analysis of NoC-inspired virtual topologies for digital microfluidic biochips. ISIC (2014)
Joseph Tarango, Eamonn J. Keogh, Philip Brisk
Accelerating the dynamic time warping distance measure using logarithmetic arithmetic. ACSSC (2014)
Jeffrey McDaniel, Daniel T. Grissom, Philip Brisk
Multi-terminal PCB escape routing for digital microfluidic biochips using negotiated congestion. VLSI-SoC (2014)
Daniel T. Grissom, Philip Brisk
Fast Online Synthesis of Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (3) (2014)
Mirjana Stojilovic, David Novo, Lazar Saranovac, Philip Brisk, Paolo Ienne
Selective Flexibility: Creating Domain-Specific Reconfigurable Arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (5) (2013)
Joseph Tarango, Eamonn J. Keogh, Philip Brisk
Instruction set extensions for Dynamic Time Warping. CODES+ISSS (2013)
Jeffrey McDaniel, Auralila Baez, Brian Crites, Aditya Tammewar, Philip Brisk
Design and verification tools for continuous fluid flow-based microfluidic devices. ASP-DAC (2013)
Jeffrey McDaniel, Christopher Curtis, Philip Brisk
Automatic synthesis of microfluidic large scale integration chips from a domain-specific language. BioCAS (2013)
Sambit Kumar Shukla, Yang Yang, Laxmi N. Bhuyan, Philip Brisk
Shared memory heterogeneous computation on PCIe-supported platforms. FPL (2013)
Liang Chen, Joseph Tarango, Tulika Mitra, Philip Brisk
A just-in-time customizable processor. ICCAD (2013)
Daniel T. Grissom, Philip Brisk
A field-programmable pin-constrained digital microfluidic biochip. DAC (2013)
Ali Galip Bayrak, Nikola Velickovic, Francesco Regazzoni, David Novo, Philip Brisk, Paolo Ienne
An EDA-friendly protection scheme against side-channel attacks. DATE (2013)
Philip Brisk, Tulika Mitra
Introduction to the special issue on application-specific processors. ACM Trans. Embed. Comput. Syst. 13 (2) (2013)
Benoit Boissinot, Philip Brisk, Alain Darte, Fabrice Rastello
SSI Properties Revisited. ACM Trans. Embed. Comput. Syst. 11 (S1) (2012)
Mirjana Stojilovic, David Novo, Lazar Saranovac, Philip Brisk, Paolo Ienne
Selective flexibility: Breaking the rigidity of datapath merging. DATE (2012)
Daniel T. Grissom, Philip Brisk
A high-performance online assay interpreter for digital microfluidic biochips. ACM Great Lakes Symposium on VLSI (2012)
Daniel T. Grissom, Philip Brisk
Path scheduling on digital microfluidic biochips. DAC (2012)
Daniel T. Grissom, Kenneth O'Neal, Benjamin Preciado, Hiral Patel, Robert Doherty, Nick Liao, Philip Brisk
A digital microfluidic biochip synthesis framework. VLSI-SoC (2012)
Aanjhan Ranganathan, Ali Galip Bayrak, Theo Kluter, Philip Brisk, Edoardo Charbon, Paolo Ienne
Counting stream registers: An efficient and effective snoop filter architecture. ICSAMOS (2012)
Yehdhih Ould Mohammed Moctar, Nithin George, Hadi Parandeh-Afshar, Paolo Ienne, Guy G. F. Lemieux, Philip Brisk
Reducing the cost of floating-point mantissa alignment and normalization in FPGAs. FPGA (2012)
Kenneth O'Neal, Daniel T. Grissom, Philip Brisk
Force-Directed List Scheduling for Digital Microfluidic Biochips. VLSI-SoC (2012)
Yehdhih Ould Mohammed Moctar, Guy G. F. Lemieux, Philip Brisk
Routing algorithms for FPGAS with sparse intra-cluster routing crossbars. FPL (2012)
Daniel T. Grissom, Philip Brisk
Fast online synthesis of generally programmable digital microfluidic biochips. CODES+ISSS (2012)
Hadi Parandeh-Afshar, Grace Zgheib, Philip Brisk, Paolo Ienne
Reducing the pressure on routing resources of FPGAs with generic logic chains. FPGA (2011)
Hadi Parandeh-Afshar, Arkosnato Neogy, Philip Brisk, Paolo Ienne
Compressor tree synthesis on commercial high-performance FPGAs. ACM Trans. Reconfigurable Technol. Syst. 4 (4) (2011)
Philip Brisk
Architecture and design automation for application-specific processors. ASICON (2011)
Ali Galip Bayrak, Francesco Regazzoni, Philip Brisk, François-Xavier Standaert, Paolo Ienne
A first step towards automatic application of power analysis countermeasures. DAC (2011)
Quentin Colombet, Benoit Boissinot, Philip Brisk, Sebastian Hack, Fabrice Rastello
Graph-coloring and treescan register allocation using repairing. CASES (2011)
Ajay K. Verma, Philip Brisk, Paolo Ienne
Fast, Nearly Optimal ISE Identification With I/O Serialization Through Maximal Clique Enumeration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (3) (2010)
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo Charbon, Paolo Ienne
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions. HiPEAC (2010)
Nagaraju Pothineni, Philip Brisk, Paolo Ienne, Anshul Kumar, Kolin Paul
A high-level synthesis flow for custom instruction set extensions for application-specific processors. ASP-DAC (2010)
Amit Verma, Ajay K. Verma, Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
Synthesis of Floating-Point Addition Clusters on FPGAs Using Carry-Save Arithmetic. FPL (2010)
Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Paolo Ienne
Improving FPGA Performance for Carry-Save Arithmetic. IEEE Trans. Very Large Scale Integr. Syst. 18 (4) (2010)
Philip Brisk, Ajay K. Verma, Paolo Ienne
An Optimal Linear-Time Algorithm for Interprocedural Register Allocation in High Level Synthesis Using SSA Form. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (7) (2010)
José Luis Ayala, David Atienza, Philip Brisk
Thermal-aware data flow analysis. DAC (2009)

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Publication Activity (10 Years)

Top Topics

Top Venues

Philip Brisk