José Luis Ayala

Publication Activity (10 Years)

Years Active: 2005-2022
Publications (10 Years): 9

Top Topics

Design Space Exploration

Comparative Study

Energy Efficient

Top Venues

J. Parallel Distributed Comput.

Publications

Javier Gálvez-Goicurla, Josué Pagán, Lucia Perez, Julian Catalina-Gomez, José Manuel Moya, José Luis Ayala
Reproducible and accurate subject-wise sleep posture detection by detecting and removing turns. COINS (2022)
Franklin Parrales Bravo, Alberto A. Del Barrio, José Luis Ayala
A study on the parallelization of moeas to predict the patient's response to the onabotulinumtoxina treatment. SummerSim (2019)
Juan Carlos Salinas-Hilburg, Marina Zapater, José Manuel Moya, José Luis Ayala
Fast Energy Estimation Through Partial Execution of HPC Applications. ASAP (2018)
Amir-Mohammad Rahmani, Pasi Liljeberg, José Luis Ayala, Hannu Tenhunen, Alexander V. Veidenbaum
Special issue on energy efficient multi-core and many-core systems, Part II. J. Parallel Distributed Comput. 100 (2017)
José Luis Ayala
CEDA Currents. IEEE Des. Test 34 (6) (2017)
Ranjita Kumari Dash, Vinod Pangracious, José L. Risco-Martín, Ashok Kumar Turuk, Amartya Majumdar, José Luis Ayala
Thermal Management in 3D Homogeneous NoC Systems Using Optimized Placement of Liquid Microchannels. MCSoC (2017)
José Luis Ayala
IEEE Rebooting Computing Week. IEEE Des. Test 34 (5) (2017)
Juan C. Salinas Hilburg, Marina Zapater, José Luis Risco-Martín, José Manuel Moya, José Luis Ayala
Unsupervised power modeling of co-allocated workloads for energy efficiency in data centers. DATE (2016)
Amir-Mohammad Rahmani, Pasi Liljeberg, José Luis Ayala, Hannu Tenhunen, Alexander V. Veidenbaum
Special issue on energy efficient multi-core and many-core systems, Part I. J. Parallel Distributed Comput. 95 (2016)
Alfredo Cuesta-Infante, J. Manuel Colmenar, Zorana Bankovic, José L. Risco-Martín, Marina Zapater, José Ignacio Hidalgo, José Luis Ayala, José Manuel Moya
Comparative study of meta-heuristic 3D floorplanning algorithms. Neurocomputing 150 (2015)
Patricia Arroba, José Luis Risco-Martín, Marina Zapater, José Manuel Moya, José Luis Ayala
Enhancing Regression Models for Complex Systems Using Evolutionary Techniques for Feature Engineering. J. Grid Comput. 13 (3) (2015)
Marina Zapater, Ata Turk, José Manuel Moya, José Luis Ayala, Ayse K. Coskun
Dynamic workload and cooling management in high-efficiency data centers. IGSC (2015)
Marina Zapater, Ozan Tuncer, José Luis Ayala, José Manuel Moya, Kalyan Vaidyanathan, Kenny C. Gross, Ayse K. Coskun
Leakage-Aware Cooling Management for Improving Server Energy Efficiency. IEEE Trans. Parallel Distributed Syst. 26 (10) (2015)
Marina Zapater, Patricia Arroba, José Luis Ayala, José Manuel Moya, Katzalin Olcoz
A novel energy-driven computing paradigm for e-health scenarios. Future Gener. Comput. Syst. 34 (2014)
Antonio Artés, José Luis Ayala, Robert Fasthuber, Praveen Raghavan, Francky Catthoor
Energy impact in the design space exploration of loop buffer schemes in embedded systems. VLSI-SoC (2013)
Marina Zapater, José Luis Ayala, José Manuel Moya, Kalyan Vaidyanathan, Kenny C. Gross, Ayse K. Coskun
Leakage and temperature aware server control for improving energy efficiency in data centers. DATE (2013)
Antonio Artés, Robert Fasthuber, José Luis Ayala, Praveen Raghavan, Francky Catthoor
Design Space Exploration of Distributed Loop Buffer Architectures with Incompatible Loop-Nest Organisations in Embedded Systems. J. Signal Process. Syst. 72 (1) (2013)
Ignacio Arnaldo, José Luis Risco-Martín, José Luis Ayala, José Ignacio Hidalgo
Power profiling-guided floorplanner for 3D multi-processor systems-on-chip. IET Circuits Devices Syst. 6 (5) (2012)
Ignacio Arnaldo, Alessandro Vincenzi, José Luis Ayala, José Luis Risco-Martín, José Ignacio Hidalgo, Martino Ruggiero, David Atienza
Fast and scalable temperature-driven floorplan design in 3D MPSoCs. LATW (2012)
Antonio Artés, José Luis Ayala, Ashoka Visweswara Sathanur, Jos Huisken, Francky Catthoor
Run-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications. VLSI-SoC (2011)
David Cuesta Gómez, José Luis Risco-Martín, José Luis Ayala, José Ignacio Hidalgo
A combination of evolutionary algorithm and mathematical programming for the 3d thermal-aware floorplanning problem. GECCO (2011)
David Cuesta, José Luis Ayala, José Ignacio Hidalgo, David Atienza, Andrea Acquaviva, Enrico Macii
Adaptive Task Migration Policies for Thermal Control in MPSoCs. ISVLSI (Selected papers) (2010)
Antonio Artés, Filipa Duarte, Maryam Ashouei, Jos Huisken, José Luis Ayala, David Atienza, Francky Catthoor
Energy Efficiency Using Loop Buffer based Instruction Memory Organizations. IWIA (2010)
José Luis Ayala, Cándido Méndez, Marisa López-Vallejo
Thermal analysis and modeling of embedded processors. Comput. Electr. Eng. 36 (1) (2010)
Marina Zapater, José L. Risco-Martín, Zorana Bankovic, José Luis Ayala, José Manuel Moya
Combined Dynamic-Static Approach for Thermal-Awareness in Heterogeneous Data Centers. IWIA (2010)
David Cuesta, José Luis Ayala, José Ignacio Hidalgo, Massimo Poncino, Andrea Acquaviva, Enrico Macii
Thermal-aware floorplanning exploration for 3D multi-core architectures. ACM Great Lakes Symposium on VLSI (2010)
José Luis Ayala, David Atienza, Philip Brisk
Thermal-aware data flow analysis. DAC (2009)
David Atienza, Praveen Raghavan, José Luis Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures. Integr. 41 (1) (2008)
José Luis Ayala, Marisa López-Vallejo, Carlos A. López-Barrio, Alexander V. Veidenbaum
A hardware mechanism to reduce the energy consumption of the register file of in-order architectures. Int. J. Embed. Syst. 3 (4) (2008)
José Luis Ayala, Anya Apavatjrut, David Atienza, Marisa López-Vallejo, Carlos A. López-Barrio
Thermal Characterization and Thermal Management in Processor-Based Systems. Power-aware Computing Systems (2007)
Cándido Méndez, José Luis Ayala, Marisa López-Vallejo
Target Independent Thermal Modeling for Embedded Processors. IES (2006)
José Luis Ayala, Cándido Méndez, Marisa López-Vallejo
Analysis of the Thermal Impact of Source-Code Transformations in Embedded-Processors. ICECS (2006)
Pedro Echeverría, José Luis Ayala, Marisa López-Vallejo
Leakage Energy Reduction in Banked Content Addressable Memories. ICECS (2006)
José Luis Ayala, Marisa López-Vallejo
Integrating functional and power simulation in embedded systems design. J. Embed. Comput. 1 (3) (2005)
José Luis Ayala, Marisa López-Vallejo
Compiler-Driven Power Optimizations in the Register File of Processor-Based Systems. Power-aware Computing Systems (2005)