Alexander V. Veidenbaum

Publication Activity (10 Years)

Years Active: 1986-2023
Publications (10 Years): 33

Top Venues

CoRR

LCPC

IPDPS Workshops

EMBC

Publications

Marc Titus Trifan, Alexandru Nicolau, Alexander V. Veidenbaum
Enhancing the Privacy of Machine Learning via faster arithmetic over Torus FHE. CSCloud/EdgeCom (2023)
Marc Titus Trifan, Alexandru Nicolau, Alexander V. Veidenbaum
Enhancing the Privacy of Machine Learning via faster arithmetic over Torus FHE. IACR Cryptol. ePrint Arch. 2023 (2023)
Igor Nunes, Mike Heddes, Pere Vergés, Danny Abraham, Alexander V. Veidenbaum, Alexandru Nicolau, Tony Givargis
DotHash: Estimating Set Similarity Metrics for Link Prediction and Document Deduplication. CoRR (2023)
Neftali Watkinson, Divya Devineni, Victor Joe, Tony Givargis, Alexandru Nicolau, Alexander V. Veidenbaum
Using Hyperdimensional Computing to Extract Features for the Detection of Type 2 Diabetes. IPDPS Workshops (2023)
Mike Heddes, Igor Nunes, Pere Vergés, Denis Kleyko, Danny Abraham, Tony Givargis, Alexandru Nicolau, Alexander V. Veidenbaum
Torchhd: An Open Source Python Library to Support Research on Hyperdimensional Computing and Vector Symbolic Architectures. J. Mach. Learn. Res. 24 (2023)
Igor Nunes, Mike Heddes, Pere Vergés, Danny Abraham, Alexander V. Veidenbaum, Alex Nicolau, Tony Givargis
DotHash: Estimating Set Similarity Metrics for Link Prediction and Document Deduplication. KDD (2023)
Mike Heddes, Igor Nunes, Tony Givargis, Alexandru Nicolau, Alexander V. Veidenbaum
Hyperdimensional Hashing: A Robust and Efficient Dynamic Hash Table. CoRR (2022)
Igor Nunes, Mike Heddes, Tony Givargis, Alexandru Nicolau, Alexander V. Veidenbaum
GraphHD: Efficient graph classification using hyperdimensional computing. DATE (2022)
Igor Nunes, Mike Heddes, Tony Givargis, Alexandru Nicolau, Alexander V. Veidenbaum
GraphHD: Efficient graph classification using hyperdimensional computing. CoRR (2022)
Mihnea Chirila, Paolo D'Alberto, Hsin-Yu Ting, Alexander V. Veidenbaum, Alexandru Nicolau
A Heterogeneous Solution to the All-pairs Shortest Path Problem using FPGAs. ISQED (2022)
Mike Heddes, Igor Nunes, Tony Givargis, Alexandru Nicolau, Alexander V. Veidenbaum
Hyperdimensional hashing: a robust and efficient dynamic hash table. DAC (2022)
Neftali Watkinson, Tony Givargis, Victor Joe, Alexandru Nicolau, Alexander V. Veidenbaum
Class-Modeling of Septic Shock With Hyperdimensional Computing. EMBC (2021)
Neftali Watkinson, Tony Givargis, Victor Joe, Alexandru Nicolau, Alexander V. Veidenbaum
Detecting COVID-19 Related Pneumonia On CT Scans Using Hyperdimensional Computing. EMBC (2021)
Neftali Watkinson, Preston Tai, Alexandru Nicolau, Alexander V. Veidenbaum
NumbaSummarizer: A Python Library for Simplified Vectorization Reports. IPDPS Workshops (2020)
Sajjad Taheri, Payman Behnam, Eli Bozorgzadeh, Alexander V. Veidenbaum, Alexandru Nicolau
AFFIX: Automatic Acceleration Framework for FPGA Implementation of OpenVX Vision Algorithms. FPGA (2019)
Neftali Watkinson, Aniket Shivam, Alexandru Nicolau, Alexander V. Veidenbaum
Teaching Parallel Computing and Dependence Analysis with Python. IPDPS Workshops (2019)
Aniket Shivam, Alexandru Nicolau, Alexander V. Veidenbaum
MCompiler: A Synergistic Compilation Framework. CoRR (2019)
Gongjin Sun, Junjie Shen, Alexander V. Veidenbaum
Combining Prefetch Control and Cache Partitioning to Improve Multicore Performance. IPDPS (2019)
Aniket Shivam, Neftali Watkinson, Alexandru Nicolau, David A. Padua, Alexander V. Veidenbaum
Towards an Achievable Performance for the Loop Nests. CoRR (2019)
Sajjad Taheri, Jin Heo, Payman Behnam, Jeffrey Chen, Alexander V. Veidenbaum, Alexandru Nicolau
Acceleration Framework for FPGA Implementation of OpenVX Graph Pipelines. FCCM (2018)
Zhangxiaowen Gong, Zhi Chen, Justin Josef Szaday, David C. Wong, Zehra Sura, Neftali Watkinson, Saeed Maleki, David A. Padua, Alexander V. Veidenbaum, Alexandru Nicolau, Josep Torrellas
An empirical study of the effect of source-level loop transformations on compiler stability. Proc. ACM Program. Lang. 2 (OOPSLA) (2018)
Aniket Shivam, Neftali Watkinson, Alexandru Nicolau, David A. Padua, Alexander V. Veidenbaum
Towards an Achievable Performance for the Loop Nests. LCPC (2018)
Junjie Shen, Zhi Chen, Nahid Farhady Ghalaty, Rosario Cammarota, Alexandru Nicolau, Alexander V. Veidenbaum
New Opportunities for Compilers in Computer Security. LCPC (2018)
Sajjad Taheri, Alexander V. Veidenbaum, Alexandru Nicolau, Ningxin Hu, Mohammad R. Haghighat
OpenCV.js: computer vision processing for the open web platform. MMSys (2018)
Neftali Watkinson, Aniket Shivam, Zhi Chen, Alexander V. Veidenbaum, Alexandru Nicolau, Zhangxiaowen Gong
Using Hardware Counters to Predict Vectorization. LCPC (2017)
Amir-Mohammad Rahmani, Pasi Liljeberg, José Luis Ayala, Hannu Tenhunen, Alexander V. Veidenbaum
Special issue on energy efficient multi-core and many-core systems, Part II. J. Parallel Distributed Comput. 100 (2017)
Zhi Chen, Junjie Shen, Alex Nicolau, Alexander V. Veidenbaum, Nahid Farhady Ghalaty, Rosario Cammarota
CAMFAS: A Compiler Approach to Mitigate Fault Attacks via Enhanced SIMDization. FDTC (2017)
Zhi Chen, Zhangxiaowen Gong, Justin Josef Szaday, David C. Wong, David A. Padua, Alexandru Nicolau, Alexander V. Veidenbaum, Neftali Watkinson, Zehra Sura, Saeed Maleki, Josep Torrellas, Gerald DeJong
LORE: A loop repository for the evaluation of compilers. IISWC (2017)
Zhi Chen, Junjie Shen, Alex Nicolau, Alexander V. Veidenbaum, Nahid Farhady Ghalaty, Rosario Cammarota
CAMFAS: A Compiler Approach to Mitigate Fault Attacks via Enhanced SIMDization. IACR Cryptol. ePrint Arch. 2017 (2017)
Amir-Mohammad Rahmani, Pasi Liljeberg, José Luis Ayala, Hannu Tenhunen, Alexander V. Veidenbaum
Special issue on energy efficient multi-core and many-core systems, Part I. J. Parallel Distributed Comput. 95 (2016)
Aniket Shivam, Alexandru Nicolau, Alexander V. Veidenbaum, Mario Mango Furnari, Rosario Cammarota
Polygonal Iteration Space Partitioning. LCPC (2016)
Siavash Rezaei, César-Alejandro Hernández-Calderón, Saeed Mirzamohammadi, Eli Bozorgzadeh, Alexander V. Veidenbaum, Alex Nicolau, Michael J. Prather
Data-rate-aware FPGA-based acceleration framework for streaming applications. ReConFig (2016)
Zhi Chen, Alexandru Nicolau, Alexander V. Veidenbaum
SIMD-based soft error detection. Conf. Computing Frontiers (2016)
Sajjad Taheri, Laleh Aghababaie Beni, Alexander V. Veidenbaum, Alexandru Nicolau, Rosario Cammarota, Jianlin Qiu, Qiang Lu, Mohammad R. Haghighat
WebRTCbench: a benchmark for performance assessment of webRTC implementations. ESTIMedia (2015)
Zhi Chen, Ryoichi Inagaki, Alexandru Nicolau, Alexander V. Veidenbaum
Software fault tolerance for FPUs via vectorization. SAMOS (2015)
Carlo Galuzzi, Alexander V. Veidenbaum
Preface. ICSAMOS (2014)
Edward H. Gornish, Elana D. Granston, Alexander V. Veidenbaum
Author retrospective for compiler-directed data prefetching in multiprocessors with memory hierarchies. ICS 25th Anniversary (2014)
Milovan Duric, Oscar Palomar, Aaron Smith, Milan Stanic, Osman S. Unsal, Adrián Cristal, Mateo Valero, Doug Burger, Alexander V. Veidenbaum
Dynamic-vector execution on a general purpose EDGE chip multiprocessor. ICSAMOS (2014)
Taesu Kim, Dali Zhao, Alexander V. Veidenbaum
Multiple stream tracker: a new hardware stride prefetcher. Conf. Computing Frontiers (2014)
Yizhuo Wang, Laleh Aghababaie Beni, Alexandru Nicolau, Alexander V. Veidenbaum, Rosario Cammarota
A Compilation and Run-Time Framework for Maximizing Performance of Self-scheduling Algorithms. NPC (2014)
Nam Duong, Alexander V. Veidenbaum
Compiler-Assisted, Selective Out-Of-Order Commit. IEEE Comput. Archit. Lett. 12 (1) (2013)
Rosario Cammarota, Laleh Aghababaie Beni, Alexandru Nicolau, Alexander V. Veidenbaum
Optimizing Program Performance via Similarity, Using a Feature-Agnostic Approach. APPT (2013)
Dali Zhao, Houman Homayoun, Alexander V. Veidenbaum
Temperature aware thread migration in 3D architecture with stacked DRAM. ISQED (2013)
Rosario Cammarota, Laleh Aghababaie Beni, Alexandru Nicolau, Alexander V. Veidenbaum
Effective Evaluation of Multi-core Based Systems. ISPDC (2013)
Rosario Cammarota, Alexandru Nicolau, Alexander V. Veidenbaum, Arun Kejariwal, Debora Donato, Mukund Madhugiri
On the Determination of Inlining Vectors for Program Optimization. CC (2013)
Nam Duong, Taesu Kim, Dali Zhao, Alexander V. Veidenbaum
Revisiting level-0 caches in embedded processors. CASES (2012)
Rosario Cammarota, Arun Kejariwal, Debora Donato, Alexandru Nicolau, Alexander V. Veidenbaum
Selective search of inlining vectors for program optimization. Conf. Computing Frontiers (2012)
Rosario Cammarota, Alexandru Nicolau, Alexander V. Veidenbaum
Just in Time Load Balancing. LCPC (2012)
Nam Duong, Dali Zhao, Taesu Kim, Rosario Cammarota, Mateo Valero, Alexander V. Veidenbaum
Improving Cache Management Policies Using Dynamic Reuse Distances. MICRO (2012)
Yizhuo Wang, Alexandru Nicolau, Rosario Cammarota, Alexander V. Veidenbaum
A fault tolerant self-scheduling scheme for parallel loops on shared memory systems. HiPC (2012)
Rosario Cammarota, Arun Kejariwal, Paolo D'Alberto, Sapan Panigrahi, Alexander V. Veidenbaum, Alexandru Nicolau
Pruning hardware evaluation space via correlation-driven application similarity analysis. Conf. Computing Frontiers (2011)
Houman Homayoun, Avesta Sasan, Alexander V. Veidenbaum, Hsin-Cheng Yao, Shahin Golshan, Payam Heydari
MZZ-HVS: Multiple Sleep Modes Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19 (12) (2011)
Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, Alexander V. Veidenbaum, Fadi J. Kurdahi
On leakage power optimization in clock tree networks for ASICs and general-purpose processors. Sustain. Comput. Informatics Syst. 1 (1) (2011)
Houman Homayoun, Avesta Sasan, Jean-Luc Gaudiot, Alexander V. Veidenbaum
Reducing Power in All Major CAM and SRAM-Based Processor Units via Centralized, Dynamic Resource Size Management. IEEE Trans. Very Large Scale Integr. Syst. 19 (11) (2011)
Shahin Golshan, Eli Bozorgzadeh, Benjamin Carrión Schäfer, Kazutoshi Wakabayashi, Houman Homayoun, Alexander V. Veidenbaum
Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems. ISLPED (2010)
Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos
On the efficacy of call graph-level thread-level speculation. WOSP/SIPEW (2010)
Houman Homayoun, Shahin Golshan, Eli Bozorgzadeh, Alexander V. Veidenbaum, Fadi J. Kurdahi
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks. ISQED (2010)
Houman Homayoun, Avesta Sasan, Aseem Gupta, Alexander V. Veidenbaum, Fadi J. Kurdahi, Nikil D. Dutt
Multiple sleep modes leakage control in peripheral circuits of a all major SRAM-based processor units. Conf. Computing Frontiers (2010)
Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos
Exploitation of nested thread-level speculative parallelism on multi-core systems. Conf. Computing Frontiers (2010)
Houman Homayoun, Aseem Gupta, Alexander V. Veidenbaum, Avesta Sasan, Fadi J. Kurdahi, Nikil D. Dutt
RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor. HiPEAC (2010)
Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito
On the exploitation of loop-level parallelism in embedded applications. ACM Trans. Embed. Comput. Syst. 8 (2) (2009)
Jayram Moorkanikara Nageswaran, Nikil D. Dutt, Jeffrey L. Krichmar, Alex Nicolau, Alexander V. Veidenbaum
Efficient simulation of large-scale Spiking Neural Networks using CUDA graphics processors. IJCNN (2009)
Jayram Moorkanikara Nageswaran, Nikil D. Dutt, Jeffrey L. Krichmar, Alex Nicolau, Alexander V. Veidenbaum
A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors. Neural Networks 22 (5-6) (2009)
Arun Kejariwal, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos
Efficient Scheduling of Nested Parallel Loops on Multi-Core Systems. ICPP (2009)
Alexandru Nicolau, Guangqiang Li, Alexander V. Veidenbaum, Arun Kejariwal
Synchronization optimizations for efficient execution on multi-cores. ICS (2009)
Maja Etinski, Julita Corbalán, Jesús Labarta, Mateo Valero, Alexander V. Veidenbaum
Power-aware load balancing of large scale MPI applications. IPDPS (2009)
Jayram Moorkanikara Nageswaran, Andrew Felch, Ashok Chandrasekhar, Nikil D. Dutt, Richard Granger, Alex Nicolau, Alexander V. Veidenbaum
Brain Derived Vision Algorithm on High Performance Architectures. Int. J. Parallel Program. 37 (4) (2009)
Darshan Desai, Gerolf Hoflehner, Arun Kejariwal, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum, Cameron McNairy
Performance Characterization of Itanium® 2-Based Montecito Processor. SPEC Benchmark Workshop (2009)
Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos
Cache-aware partitioning of multi-dimensional iteration spaces. SYSTOR (2009)
Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors. CASES (2008)
Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Xinmin Tian, Milind Girkar, Hideki Saito, Utpal Banerjee
2 Duo processor. ICSAMOS (2008)
Jelena Trajkovic, Alexander V. Veidenbaum, Arun Kejariwal
Improving SDRAM access energy efficiency for low-power embedded systems. ACM Trans. Embed. Comput. Syst. 7 (3) (2008)
Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Rubén González, Alexander V. Veidenbaum, Daniel A. Jiménez, Mateo Valero
A Two-Level Load/Store Queue Based on Execution Locality. ISCA (2008)
Carmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum
Impact of JVM superoperators on energy consumption in resource-constrained embedded systems. LCTES (2008)
Juan L. Aragón, Alexander V. Veidenbaum
Optimizing CAM-based instruction cache designs for low-power embedded systems. J. Syst. Archit. 54 (12) (2008)
Arun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos
Cache-aware iteration space partitioning. PPOPP (2008)
Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum
Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency. DAC (2008)
Houman Homayoun, Mohammad A. Makhzan, Jean-Luc Gaudiot, Alexander V. Veidenbaum
A centralized cache miss driven technique to improve processor power dissipation. ICSAMOS (2008)
José Luis Ayala, Marisa López-Vallejo, Carlos A. López-Barrio, Alexander V. Veidenbaum
A hardware mechanism to reduce the energy consumption of the register file of in-order architectures. Int. J. Embed. Syst. 3 (4) (2008)
Houman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum
Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors. LCTES (2008)
Houman Homayoun, Alexander V. Veidenbaum, Jean-Luc Gaudiot
Adaptive techniques for leakage power management in L2 cache peripheral circuits. ICCD (2008)
Houman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum
ZZ-HVS: Zig-zag horizontal and vertical sleep transistor sharing to reduce leakage power in on-chip SRAM peripheral circuits. ICCD (2008)
Isidro Gonzalez, Marco Galluzzi, Alexander V. Veidenbaum, Marco Antonio Ramírez, Adrián Cristal, Mateo Valero
A distributed processor state management architecture for large-window processors. MICRO (2008)
Arun Kejariwal, Xinmin Tian, Milind Girkar, Wei Li, Sergey Kozhukhov, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos
Tight analysis of the performance potential of thread speculation using spec CPU 2006. PPOPP (2007)
Weiyu Tang, Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau
A predictive decode filter cache for reducing power consumption in embedded processors. ACM Trans. Design Autom. Electr. Syst. 12 (2) (2007)
Arun Kejariwal, Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum
Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture. SIGMETRICS (2007)
Jeff Furlong, Andrew Felch, Jayram Moorkanikara Nageswaran, Nikil D. Dutt, Alex Nicolau, Alexander V. Veidenbaum, Ashok Chandrashekar, Richard Granger
Novel Brain-Derived Algorithms Scale Linearly with Number of Processing Elements. PARCO (2007)
Carmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum
A simplified java bytecode compilation system for resource-constrained embedded processors. CASES (2007)
Houman Homayoun, Alexander V. Veidenbaum
Reducing leakage power in peripheral circuits of L2 caches. ICCD (2007)
Milind Girkar, Arun Kejariwal, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos
Probablistic Self-Scheduling. Euro-Par (2006)
Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito
Challenges in exploitation of loop parallelism in embedded applications. CODES+ISSS (2006)
Arun Kejariwal, Xinmin Tian, Wei Li, Milind Girkar, Sergey Kozhukhov, Hideki Saito, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos
On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings. ICS (2006)
Dan Nicolaescu, Babak Salamat, Alexander V. Veidenbaum
Fast Speculative Address Generation and Way Caching for Reducing L1 Data Cache Energy. ICCD (2006)
Marco Antonio Ramírez, Adrián Cristal, Mateo Valero, Alexander V. Veidenbaum, Luis Villa
A New Pointer-based Instruction Queue Design and Its Power-Performance Evaluation. ICCD (2005)
Juan L. Aragón, Alexander V. Veidenbaum
Energy-Effective Instruction Fetch Unit for Wide Issue Processors. Asia-Pacific Computer Systems Architecture Conference (2005)
Ana Azevedo, Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau
High performance annotation-aware JVM for Java cards. EMSOFT (2005)
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau
Using a Way Cache to Improve Performance of Set-Associative Caches. ISHPC (2005)
Miquel Pericàs, Adrián Cristal, Rubén González, Alexander V. Veidenbaum, Mateo Valero
Decoupled State-Execute Architecture. ISHPC (2005)
Paolo D'Alberto, Alexandru Nicolau, Alexander V. Veidenbaum, Rajesh K. Gupta
Line Size Adaptivity Analysis of Parameterized Loop Nests for Direct Mapped Data Cache. IEEE Trans. Computers 54 (2) (2005)
Rubén González, Adrián Cristal, Miquel Pericàs, Mateo Valero, Alexander V. Veidenbaum
An asymmetric clustered processor based on value content. ICS (2005)

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Publication Activity (10 Years)

Top Topics

Top Venues

Alexander V. Veidenbaum