Nithin George

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 6

Top Topics

Parallel Architecture

Design Space Exploration

Software Implementation

Top Venues

Publications

Andy Huang, Zhiming Wang, Wenhui Ni, Sheng Chen, Nithin George
CodePin: An Instrumentation-Based Debug Tool of SYCLomatic. IWOCL (2024)
Yi-Hsiang Lai, Hongbo Rong, Size Zheng, Weihao Zhang, Xiuping Cui, Yunshan Jia, Jie Wang, Brendan Sullivan, Zhiru Zhang, Yun Liang, Youhui Zhang, Jason Cong, Nithin George, Jose Alvarez, Christopher J. Hughes, Pradeep Dubey
SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs. ICCAD (2020)
João Andrade, Nithin George, Kimon Karras, David Novo, Frederico Pratas, Leonel Sousa, Paolo Ienne, Gabriel Falcão, Vítor Silva
Design Space Exploration of LDPC Decoders Using High-Level Synthesis. IEEE Access 5 (2017)
Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne
Virtualized Execution Runtime for FPGA Accelerators in the Cloud. IEEE Access 5 (2017)
Lana Josipovic, Nithin George, Paolo Ienne
Enriching C-based High-Level Synthesis with parallel pattern templates. FPT (2016)
Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne
Designing a virtual runtime for FPGA accelerators in the cloud. FPL (2016)
João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes
Fast Design Space Exploration Using Vivado HLS: Non-binary LDPC Decoders. FCCM (2015)
João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes
From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis. FPL (2015)
Nithin George, HyoukJoong Lee, David Novo, Muhsen Owaida, David Andrews, Kunle Olukotun, Paolo Ienne
Automatic support for multi-module parallelism from computational patterns. FPL (2015)
Nithin George, HyoukJoong Lee, David Novo, Tiark Rompf, Kevin J. Brown, Arvind K. Sujeeth, Martin Odersky, Kunle Olukotun, Paolo Ienne
Hardware system synthesis from Domain-Specific Languages. FPL (2014)
Nithin George, David Novo, Tiark Rompf, Martin Odersky, Paolo Ienne
Making domain-specific hardware synthesis tools cost-efficient. FPT (2013)
Yehdhih Ould Mohammed Moctar, Nithin George, Hadi Parandeh-Afshar, Paolo Ienne, Guy G. F. Lemieux, Philip Brisk
Reducing the cost of floating-point mantissa alignment and normalization in FPGAs. FPGA (2012)