Kizheppatt Vipin

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 20

Top Topics

High Throughput

Fpga Implementation

Top Venues

IEEE Embed. Syst. Lett.

Publications

Indu Chandran, Kizheppatt Vipin
Multi-UAV Networks for Disaster Monitoring: Challenges and Opportunities from a Network Perspective. SN Comput. Sci. 5 (5) (2024)
Muhammad Irfan, Kizheppatt Vipin, Rizwan Qureshi
Accelerating DNA Sequence Analysis using Content-Addressable Memory in FPGAs. SmartCloud (2023)
Muhammad Irfan, Kizheppatt Vipin, Ray C. C. Cheung
On the Suitability of Read only Memory for FPGA-Based CAM Emulation Using Partial Reconfiguration. ARC (2021)
Arshyn Zhanbolatov, Kizheppatt Vipin, Aresh Dadlani, Dmitriy Fedorov
StocNoC: Accelerating Stochastic Models Through Reconfigurable Network on Chip Architectures. ARC (2020)
Xiangwei Li, Kizheppatt Vipin, Douglas L. Maskell, Suhaib A. Fahmy, Abhishek Kumar Jain
High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay. ISCAS (2020)
Kizheppatt Vipin
ZyNet: Automating Deep Neural Network Implementation on Low-Cost Reconfigurable Edge Computing Platforms. FPT (2019)
Kuladeep Sai Reddy, Kizheppatt Vipin
OpenNoC: An Open-Source NoC Infrastructure for FPGA-Based Hardware Acceleration. IEEE Embed. Syst. Lett. 11 (4) (2019)
Alex Pappachen James, Bhaskar Choubey, Kizheppatt Vipin
Reconfigurable Threshold Logic Networks in FPGA for Moving Object Detection. MWSCAS (2019)
Marzhan Bekbolat, Sabina Kairatova, Ayan Shymyrbay, Kizheppatt Vipin
HBLast: An Open-Source FPGA Library for DNA Sequencing Acceleration. IPDPS Workshops (2019)
Kizheppatt Vipin
AsyncBTree: Revisiting Binary Tree Topology for Efficient FPGA-Based NoC Implementation. Int. J. Reconfigurable Comput. 2019 (2019)
Kizheppatt Vipin
CANNoC: An open-source NoC architecture for ECU consolidation. MWSCAS (2018)
Kizheppatt Vipin, Suhaib A. Fahmy
FPGA Dynamic and Partial Reconfiguration: A Survey of Architectures, Methods, and Applications. ACM Comput. Surv. 51 (4) (2018)
Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne
Virtualized Execution Runtime for FPGA Accelerators in the Cloud. IEEE Access 5 (2017)
Kizheppatt Vipin, Jan Gray, Nachiket Kapre
Enabling partial reconfiguration and low latency routing using segmented FPGA NoCs. FPL (2017)
Malte Vesper, Dirk Koch, Kizheppatt Vipin, Suhaib A. Fahmy
JetStream: An open-source high-performance PCI Express 3 streaming library for FPGA-to-Host and FPGA-to-FPGA communication. FPL (2016)
Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne
Designing a virtual runtime for FPGA accelerators in the cloud. FPL (2016)
Amit Kulkarni, Kizheppatt Vipin, Dirk Stroobandt
MiCAP: a custom reconfiguration controller for dynamic circuit specialization. ReConFig (2015)
Kizheppatt Vipin, Suhaib A. Fahmy
Mapping adaptive hardware systems with partial reconfiguration using CoPR for Zynq. AHS (2015)
Suhaib A. Fahmy, Kizheppatt Vipin, Shanker Shreejith
Virtualized FPGA Accelerators for Efficient Cloud Computing. CloudCom (2015)
Shanker Shreejith, Bhaskar Banarjee, Kizheppatt Vipin, Suhaib A. Fahmy
Dynamic Cognitive Radios on the Xilinx Zynq Hybrid FPGA. CrownCom (2015)
Kizheppatt Vipin, Shanker Shreejith, Suhaib A. Fahmy, Arvind Easwaran
Mapping Time-Critical Safety-Critical Cyber Physical Systems to Hybrid FPGAs. CPSNA (2014)
Kizheppatt Vipin, Suhaib A. Fahmy
Automated Partial Reconfiguration Design for Adaptive Systems with CoPR for Zynq. FCCM (2014)
Kizheppatt Vipin, Suhaib A. Fahmy
ZyCAP: Efficient Partial Reconfiguration Management on the Xilinx Zynq. IEEE Embed. Syst. Lett. 6 (3) (2014)
Kizheppatt Vipin, Suhaib A. Fahmy
DyRACT: A partial reconfiguration enabled accelerator and test platform. FPL (2014)
Kizheppatt Vipin, Suhaib A. Fahmy
Automated Partitioning for Partial Reconfiguration Design of Adaptive Systems. IPDPS Workshops (2013)
Kizheppatt Vipin, Suhaib A. Fahmy
An Approach to a Fully Automated Partial Reconfiguration Design Flow. FCCM (2013)
Shanker Shreejith, Kizheppatt Vipin, Suhaib A. Fahmy, Martin Lukasiewycz
An approach for redundancy in FlexRay networks using FPGA partial reconfiguration. DATE (2013)
Kizheppatt Vipin, Shanker Shreejith, Dulitha Gunasekera, Suhaib A. Fahmy, Nachiket Kapre
System-level FPGA device driver with high-level synthesis support. FPT (2013)
Kizheppatt Vipin, Suhaib A. Fahmy
A high speed open source controller for FPGA Partial Reconfiguration. FPT (2012)
Kizheppatt Vipin, Suhaib A. Fahmy
Architecture-Aware Reconfiguration-Centric Floorplanning for Partial Reconfiguration. ARC (2012)
Kizheppatt Vipin, Suhaib A. Fahmy
A threat-based Connect6 implementation on FPGA. FPT (2011)
Kizheppatt Vipin, Suhaib A. Fahmy
Efficient region allocation for adaptive partial reconfiguration. FPT (2011)
Kizheppatt Vipin, Suhaib A. Fahmy
Enabling high level design of adaptive systems with partial reconfiguration. FPT (2011)