Douglas L. Maskell

ORCID

Publication Activity (10 Years)

Years Active: 1999-2024
Publications (10 Years): 38

Top Venues

CoRR

MWSCAS

ACM Trans. Reconfigurable Technol. Syst.

FCCM

Publications

Xuan Wu, Di Wang, Lijie Wen, Yubin Xiao, Chunguo Wu, Yuesong Wu, Chaoyu Yu, Douglas L. Maskell, You Zhou
Neural Combinatorial Optimization Algorithms for Solving Vehicle Routing Problems: A Comprehensive Survey with Perspectives. CoRR (2024)
Xiangwei Li, Douglas L. Maskell, Carol Jingyi Li, Philip H. W. Leong, David Boland
A Scalable Systolic Accelerator for Estimation of the Spectral Correlation Density Function and Its FPGA Implementation. ACM Trans. Reconfigurable Technol. Syst. 16 (1) (2023)
P. Balasubramanian, Douglas L. Maskell
Fault-Tolerant Design Approach Based on Approximate Computing. CoRR (2023)
Abhishek Kumar Jain, Douglas L. Maskell, Suhaib A. Fahmy
Coarse Grained FPGA Overlay for Rapid Just-In-Time Accelerator Compilation. IEEE Trans. Parallel Distributed Syst. 33 (6) (2022)
Padmanabhan Balasubramanian, Raunaq Nayar, Okkar Min, Douglas L. Maskell
Approximator: A Software Tool for Automatic Generation of Approximate Arithmetic Circuits. Comput. 11 (1) (2022)
Padmanabhan Balasubramanian, Raunaq Nayar, Douglas L. Maskell, Nikos E. Mastorakis
An Approximate Adder With a Near-Normal Error Distribution: Design, Error Analysis and Practical Application. IEEE Access 9 (2021)
Padmanabhan Balasubramanian, Raunaq Nayar, Douglas L. Maskell
An Approximate Adder with Reduced Error and Optimized Design Metrics. APCCAS (2021)
P. Balasubramanian, Raunaq Nayar, Douglas L. Maskell
Gate-Level Static Approximate Adders. CoRR (2021)
Raunaq Nayar, Padmanabhan Balasubramanian, Douglas L. Maskell
Hardware Optimized Approximate Adder with Normal Error Distribution. ISVLSI (2020)
Tao Luo, Wei Zhang, Bingsheng He, Cheng Liu, Douglas L. Maskell
Energy Efficient In-memory Integer Multiplication Based on Racetrack Memory. ICDCS (2020)
Xiangwei Li, Kizheppatt Vipin, Douglas L. Maskell, Suhaib A. Fahmy, Abhishek Kumar Jain
High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay. ISCAS (2020)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Area Optimized Quasi Delay Insensitive Majority Voter for TMR Applications. CoRR (2020)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Indicating Asynchronous Multipliers. CoRR (2019)
P. Balasubramanian, Douglas L. Maskell
Indicating Asynchronous Array Multipliers. CoRR (2019)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Speed and Energy Optimised Quasi-Delay-Insensitive Block Carry Lookahead Adder. CoRR (2019)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Majority and Minority Voted Redundancy for Safety-Critical Applications. CoRR (2019)
Jaytrilok Choudhary, P. Balasubramanian, Danny M. Varghese, Dhirendra Pratap Singh, Douglas L. Maskell
Generalized Majority Voter Design Method for N-Modular Redundant Systems Used in Mission- and Safety-Critical Applications. Comput. 8 (1) (2019)
Xiangwei Li, Douglas L. Maskell
Time-Multiplexed FPGA Overlay Architectures: A Survey. ACM Trans. Design Autom. Electr. Syst. 24 (5) (2019)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Asynchronous Early Output Block Carry Lookahead Adder with Improved Quality of Results. CoRR (2019)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Area Optimized Quasi Delay Insensitive Majority Voter for TMR Applications. EECS (2019)
P. Balasubramanian, Douglas L. Maskell
A Self-Healing Redundancy Scheme for Mission/Safety-Critical Applications. IEEE Access 6 (2018)
Xiangwei Li, Abhishek Kumar Jain, Douglas L. Maskell, Suhaib A. Fahmy
A time-multiplexed FPGA overlay with linear interconnect. DATE (2018)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Majority and Minority Voted Redundancy for Safety-Critical Applications. MWSCAS (2018)
P. Balasubramanian, Douglas L. Maskell, Krishnamachar Prasad
A System Health Indicator for the Distributed Minority and Majority Voting Based Redundancy Scheme. TENCON (2018)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Asynchronous Early Output Block Carry Lookahead Adder with Improved Quality of Results. MWSCAS (2018)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Indicating Asynchronous Multipliers. EECS (2018)
P. Balasubramanian, Douglas L. Maskell
Hardware Efficient Approximate Adder Design. TENCON (2018)
P. Balasubramanian, Cuong Dang, Douglas L. Maskell
Approximate quasi-delay-insensitive asynchronous adders: Design and analysis. MWSCAS (2017)
Tao Luo, Hao Liang, Wei Zhang, Bingsheng He, Douglas L. Maskell
A Hybrid Logic Block Architecture in FPGA for Holistic Efficiency. IEEE Trans. Circuits Syst. II Express Briefs (1) (2017)
Abhishek Kumar Jain, Douglas L. Maskell, Suhaib A. Fahmy
Resource-Aware Just-in-Time OpenCL Compiler for Coarse-Grained FPGA Overlays. CoRR (2017)
P. Balasubramanian, Cuong Dang, Douglas L. Maskell, K. Prasad
Asynchronous Early Output Section-Carry Based Carry Lookahead Adder with Alias Carry Logic. CoRR (2017)
Tao Luo, Bingsheng He, Wei Zhang, Douglas L. Maskell
A novel two-stage modular multiplier based on racetrack memory for asymmetric cryptography. ICCAD (2017)
P. Balasubramanian, Cuong Dang, Douglas L. Maskell, K. Prasad
Approximate Ripple Carry and Carry Lookahead Adders - A Comparative Analysis. CoRR (2017)
Abhishek Kumar Jain, Xiangwei Li, Pranjul Singhai, Douglas L. Maskell, Suhaib A. Fahmy
DeCO: A DSP Block Based FPGA Accelerator Overlay with Low Overhead Interconnect. FCCM (2016)
Abhishek Kumar Jain, Douglas L. Maskell, Suhaib A. Fahmy
Throughput oriented FPGA overlays using DSP blocks. DATE (2016)
Xiangwei Li, Abhishek Kumar Jain, Douglas L. Maskell, Suhaib A. Fahmy
An Area-Efficient FPGA Overlay using DSP Block based Time-multiplexed Functional Units. CoRR (2016)
Tao Luo, Wei Zhang, Bingsheng He, Douglas L. Maskell
A racetrack memory based in-memory booth multiplier for cryptography application. ASP-DAC (2016)
Abhishek Kumar Jain, Douglas L. Maskell, Suhaib A. Fahmy
Are Coarse-Grained Overlays Ready for General Purpose Application Acceleration on FPGAs? DASC/PiCom/DataCom/CyberSciTech (2016)
Abhishek Kumar Jain, Xiangwei Li, Suhaib A. Fahmy, Douglas L. Maskell
Adapting the DySER Architecture with DSP Blocks as an Overlay for the Xilinx Zynq. SIGARCH Comput. Archit. News 43 (4) (2015)
Lian Lian Jiang, Douglas L. Maskell
Automatic fault detection and diagnosis for photovoltaic systems using combined artificial neural network and analytical based methods. IJCNN (2015)
Xinan Zhang, Gilbert Hock Beng Foo, D. Mahinda Vilathgamuwa, Douglas L. Maskell
An Improved Robust Field-Weakeaning Algorithm for Direct-Torque-Controlled Synchronous-Reluctance-Motor Drives. IEEE Trans. Ind. Electron. 62 (5) (2015)
P. Balasubramanian, Douglas L. Maskell
A distributed minority and majority voting based redundancy scheme. Microelectron. Reliab. 55 (9-10) (2015)
Abhishek Kumar Jain, Suhaib A. Fahmy, Douglas L. Maskell
Efficient Overlay Architecture Based on DSP Blocks. FCCM (2015)
Lian Lian Jiang, Douglas L. Maskell
A uniform implementation scheme for evolutionary optimization algorithms and the experimental implementation of an ACO based MPPT for PV systems under partial shading. CIASG (2014)
Hui Yan Cheah, Fredrik Brosser, Suhaib A. Fahmy, Douglas L. Maskell
The iDEA DSP Block-Based Soft Processor for FPGAs. ACM Trans. Reconfigurable Technol. Syst. 7 (3) (2014)
D. R. Nayanasiri, D. Mahinda Vilathgamuwa, Douglas L. Maskell, Gilbert Hock Beng Foo
Soft-switching single inductor current-fed push-pull converter for PV applications. IECON (2014)
Abhishek Kumar Jain, Khoa Dang Pham, Jin Cui, Suhaib A. Fahmy, Douglas L. Maskell
Virtualized Execution and Management of Hardware Tasks on a Hybrid ARM-FPGA Platform. J. Signal Process. Syst. 77 (1-2) (2014)
Dulika R. Nayanasiri, D. Mahinda Vilathgamuwa, Douglas L. Maskell
HFL micro inverter with front-end diode clamped multi-level inverter and half-wave cycloconverter. ISIE (2014)
D. R. Nayanasiri, D. Mahinda Vilathgamuwa, Douglas L. Maskell
Current-controlled resonant circuit based photovoltaic micro-inverter with half- wave cycloconverter. IAS (2013)
Sunita Chandrasekaran, Shilpa Shanbagh, Ramkumar Jayaraman, Douglas L. Maskell, Hui Yan Cheah
C2FPGA - A dependency-timing graph design methodology. J. Parallel Distributed Comput. 73 (11) (2013)
Yupeng Chen, Bertil Schmidt, Douglas L. Maskell
Reconfigurable Accelerator for the Word-Matching Stage of BLASTN. IEEE Trans. Very Large Scale Integr. Syst. 21 (4) (2013)
D. R. Nayanasiri, D. Mahinda Vilathgamuwa, Douglas L. Maskell
High-frequency-link micro-inverter with front-end current-fed half-bridge boost converter and half-wave cycloconverter. IECON (2013)
Lian Lian Jiang, D. R. Nayanasiri, Douglas L. Maskell, D. Mahinda Vilathgamuwa
A simple and efficient hybrid maximum power point tracking method for PV systems under partially shaded condition. IECON (2013)
Yupeng Chen, Bertil Schmidt, Douglas L. Maskell
A hybrid short read mapping accelerator. BMC Bioinform. 14 (2013)
Khoa Dang Pham, Abhishek Kumar Jain, Jin Cui, Suhaib A. Fahmy, Douglas L. Maskell
Microkernel hypervisor for a hybrid ARM-FPGA platform. ASAP (2013)
Jin Cui, Douglas L. Maskell
A Fast High-Level Event-Driven Thermal Estimator for Dynamic Thermal Aware Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (6) (2012)
Bertil Schmidt, Douglas L. Maskell
Fourth Workshop on using Emerging Parallel Architectures. ICCS (2012)
Hui Yan Cheah, Suhaib A. Fahmy, Douglas L. Maskell
iDEA: A DSP block based FPGA soft processor. FPT (2012)
Hui Yan Cheah, Suhaib A. Fahmy, Douglas L. Maskell, Chidamber Kulkarni
A lean FPGA soft processor built using a DSP block. FPGA (2012)
Yupeng Chen, Bertil Schmidt, Douglas L. Maskell
An FPGA aligner for short read mapping. FPL (2012)
Lian Lian Jiang, Douglas L. Maskell, Jagdish Chandra Patra
Chebyshev Functional Link Neural Network-based modeling and experimental verification for photovoltaic arrays. IJCNN (2012)
Yupeng Chen, Bertil Schmidt, Douglas L. Maskell
Accelerating short read mapping on an FPGA (abstract only). FPGA (2012)
Yongchao Liu, Bertil Schmidt, Douglas L. Maskell
CUSHAW: a CUDA compatible short read aligner to large genomes based on the Burrows-Wheeler transform. Bioinform. 28 (14) (2012)
Lian Lian Jiang, Douglas L. Maskell, Jagdish Chandra Patra
A flann-based controller for maximum power point tracking in PV systems under rapidly changing conditions. ICASSP (2012)
Jagdish Chandra Patra, Lian Lian Jiang, Douglas L. Maskell
Estimation of external quantum efficiency for multi-junction solar cells under influence of charged particles using artificial neural networks. SMC (2011)
Yongchao Liu, Bertil Schmidt, Douglas L. Maskell
Parallelized short read assembly of large genomes using de Bruijn graphs. BMC Bioinform. 12 (2011)
Lakshmi Kuttippurathu, Michael Hsing, Yongchao Liu, Bertil Schmidt, Douglas L. Maskell, Kyungjoon Lee, Aibin He, William T. Pu, Sek Won Kong
CompleteMOTIFs: DNA motif discovery platform for transcription factor binding experiments. Bioinform. 27 (5) (2011)
Yongchao Liu, Bertil Schmidt, Douglas L. Maskell
An Ultrafast Scalable Many-Core Motif Discovery Algorithm for Multiple GPUs. IPDPS Workshops (2011)
Yongchao Liu, Bertil Schmidt, Douglas L. Maskell
DecGPU: distributed error correction on massively parallel graphics processing units using CUDA and MPI. BMC Bioinform. 12 (2011)
Chai Quek, Zaiyi Guo, Douglas L. Maskell
A Novel Fuzzy Associative Memory Architecture for Stock Market Prediction and Trading. Int. J. Fuzzy Syst. Appl. 1 (1) (2011)
Ramkumar Jayaraman, Handi Kartadihardja, Douglas L. Maskell
Performance-Power Design Space Exploration in a Hybrid Computing Platform Suitable for Mobile Applications. ISED (2011)
Bertil Schmidt, Douglas L. Maskell
Third Workshop on using Emerging Parallel Architectures. ICCS (2011)
Bertil Schmidt, Douglas L. Maskell
Second Workshop on using Emerging Parallel Architectures. ICCS (1) (2010)
Yongchao Liu, Bertil Schmidt, Douglas L. Maskell
MSAProbs: multiple sequence alignment based on pair hidden Markov models and partition function posterior probabilities. Bioinform. 26 (16) (2010)
Sunita Chandrasekaran, Shilpa Shanbagh, Douglas L. Maskell
A dependency graph based methodology for parallelizing HLL applications on FPGA (abstract only). FPGA (2010)
Jin Cui, Douglas L. Maskell
High level event driven thermal estimation for thermal aware task allocation and scheduling. ASP-DAC (2010)
Achutavarrier Prasad Vinod, Edmund Ming-Kit Lai, Douglas L. Maskell, Pramod Kumar Meher
An improved common subexpression elimination method for reducing logic operators in FIR filter implementations without increasing logic depth. Integr. 43 (1) (2010)
Ghee Ming Goh, Chai Quek, Douglas L. Maskell
EpiList II: Closing the Loop in the Development of Generic Cognitive Skills. IEEE Trans. Syst. Man Cybern. Part A 40 (4) (2010)
Yongchao Liu, Bertil Schmidt, Weiguo Liu, Douglas L. Maskell
CUDA-MEME: Accelerating motif discovery in biological sequences using CUDA-enabled graphics processing units. Pattern Recognit. Lett. 31 (14) (2010)
Yongchao Liu, Bertil Schmidt, Douglas L. Maskell
MSA-CUDA: Multiple Sequence Alignment on Graphics Processing Units with CUDA. ASAP (2009)
Yupeng Chen, Bertil Schmidt, Douglas L. Maskell
A Reconfigurable Bloom Filter Architecture for BLASTN. ARCS (2009)
Jin Cui, Douglas L. Maskell
Dynamic thermal-aware scheduling on chip multiprocessor for soft real-time system. ACM Great Lakes Symposium on VLSI (2009)
Timothy F. Oliver, Bertil Schmidt, Yanto Jakop, Douglas L. Maskell
High Speed Biological Sequence Analysis With Hidden Markov Models on Reconfigurable Platforms. IEEE Trans. Inf. Technol. Biomed. 13 (5) (2009)
Yongchao Liu, Bertil Schmidt, Douglas L. Maskell
Parallel reconstruction of neighbor-joining trees for large multiple sequence alignments using CUDA. IPDPS (2009)
Bertil Schmidt, Douglas L. Maskell
Workshop on Using Emerging Parallel Architectures for Computational Science. ICCS (1) (2009)
Douglas L. Maskell, A. Prasad Vinod
Efficient multiplierless channel filters for multi-standard SDR. CIT (2008)
Yi Wang, Douglas L. Maskell, Jussipekka Leiwo
A unified architecture for a public key cryptographic coprocessor. J. Syst. Archit. 54 (10) (2008)
Douglas L. Maskell, Achutavarrier Prasad Vinod, Graham S. Woods
Multiplierless multi-standard SDR channel filters. MMSP (2008)
Yan Lin Aung, Douglas L. Maskell, Timothy F. Oliver, Bertil Schmidt, William Bong
C-Based Design Methodology for FPGA Implementation of ClustalW MSA. PRIB (2007)
Xiaoyong Chen, Douglas L. Maskell, Yang Sun
Fast Identification of Custom Instructions for Extensible Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (2) (2007)
Alvin Cai, Chai Quek, Douglas L. Maskell
Type-2 GA-TSK fuzzy neural network. IEEE Congress on Evolutionary Computation (2007)
Timothy F. Oliver, Douglas L. Maskell
Prerouted FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System. EURASIP J. Embed. Syst. 2007 (2007)
Douglas L. Maskell
Design of efficient multiplierless FIR filters. IET Circuits Devices Syst. 1 (2) (2007)
Xiaoyong Chen, Douglas L. Maskell
Supporting multiple-input, multiple-output custom functions in configurable processors. J. Syst. Archit. 53 (5-6) (2007)
Ian McLoughlin, Douglas L. Maskell, Thambipillai Srikanthan, Wooi-Boon Goh
An Embedded Systems graduate education for Singapore. ICPADS (2007)
Timothy F. Oliver, Bertil Schmidt, Douglas L. Maskell, Darran Nathan, Ralf Clemens
High-speed Multiple Sequence Alignment on a reconfigurable platform. Int. J. Bioinform. Res. Appl. 2 (4) (2006)
Yi Wang, Douglas L. Maskell, Jussipekka Leiwo, Thambipillai Srikanthan
Unified Signed-Digit Number Adder for RSA and ECC Public-key Cryptosystems. APCCAS (2006)
Timothy F. Oliver, Bertil Schmidt, Yanto Jakop, Douglas L. Maskell
Accelerating the Viterbi Algorithm for Profile Hidden Markov Models Using Reconfigurable Hardware. International Conference on Computational Science (1) (2006)
Jussipekka Leiwo, Lam-for Kwok, Douglas L. Maskell, Nenad Stankovic
A technique for expressing IT security objectives. Inf. Softw. Technol. 48 (7) (2006)
Douglas L. Maskell, Timothy F. Oliver
Pre-Routed FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System. Dynamically Reconfigurable Architectures (2006)

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Publication Activity (10 Years)

Top Topics

Top Venues

Douglas L. Maskell