P. Balasubramanian

Publication Activity (10 Years)

Years Active: 2008-2023
Publications (10 Years): 41

Top Topics

Majority Voting

Asynchronous Communication

Fault Tolerance

Figure Of Merit

Top Venues

Publications

P. Balasubramanian, Douglas L. Maskell
Fault-Tolerant Design Approach Based on Approximate Computing. CoRR (2023)
P. Balasubramanian, Raunaq Nayar, Douglas L. Maskell
Gate-Level Static Approximate Adders. CoRR (2021)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Area Optimized Quasi Delay Insensitive Majority Voter for TMR Applications. CoRR (2020)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Indicating Asynchronous Multipliers. CoRR (2019)
P. Balasubramanian, Douglas L. Maskell
Indicating Asynchronous Array Multipliers. CoRR (2019)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Speed and Energy Optimised Quasi-Delay-Insensitive Block Carry Lookahead Adder. CoRR (2019)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Majority and Minority Voted Redundancy for Safety-Critical Applications. CoRR (2019)
Jaytrilok Choudhary, P. Balasubramanian, Danny M. Varghese, Dhirendra Pratap Singh, Douglas L. Maskell
Generalized Majority Voter Design Method for N-Modular Redundant Systems Used in Mission- and Safety-Critical Applications. Comput. 8 (1) (2019)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Asynchronous Early Output Block Carry Lookahead Adder with Improved Quality of Results. CoRR (2019)
P. Balasubramanian
Performance Comparison of Quasi-Delay-Insensitive Asynchronous Adders. CoRR (2019)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Area Optimized Quasi Delay Insensitive Majority Voter for TMR Applications. EECS (2019)
P. Balasubramanian
Comments on "Dual-rail asynchronous logic multi-level implementation". CoRR (2018)
P. Balasubramanian, Douglas L. Maskell
A Self-Healing Redundancy Scheme for Mission/Safety-Critical Applications. IEEE Access 6 (2018)
P. Balasubramanian
Asynchronous Ripple Carry Adder based on Area Optimized Early Output Dual-Bit Full Adder. CoRR (2018)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Majority and Minority Voted Redundancy for Safety-Critical Applications. MWSCAS (2018)
P. Balasubramanian, Douglas L. Maskell, Krishnamachar Prasad
A System Health Indicator for the Distributed Minority and Majority Voting Based Redundancy Scheme. TENCON (2018)
P. Balasubramanian
Approximate Early Output Asynchronous Adders Based on Dual-Rail Data Encoding and 4-Phase Return-to-Zero and Return-to-One Handshaking. CoRR (2018)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Asynchronous Early Output Block Carry Lookahead Adder with Improved Quality of Results. MWSCAS (2018)
P. Balasubramanian
Performance Comparison of some Synchronous Adders. CoRR (2018)
P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis
Indicating Asynchronous Multipliers. EECS (2018)
P. Balasubramanian, Douglas L. Maskell
Hardware Efficient Approximate Adder Design. TENCON (2018)
P. Balasubramanian, Cuong Dang, Douglas L. Maskell
Approximate quasi-delay-insensitive asynchronous adders: Design and analysis. MWSCAS (2017)
P. Balasubramanian, K. Prasad
Asynchronous Early Output Dual-Bit Full Adders Based on Homogeneous and Heterogeneous Delay-Insensitive Data Encoding. CoRR (2017)
P. Balasubramanian, R. T. Naayagi
Mathematical Estimation of Logical Masking Capability of Majority/Minority Gates Used in Nanoelectronic Circuits. CoRR (2017)
P. Balasubramanian, R. T. Naayagi
Redundant Logic Insertion and Fault Tolerance Improvement in Combinational Circuits. CoRR (2017)
P. Balasubramanian, Cuong Dang
A comparison of quasi-delay-insensitive asynchronous adder designs corresponding to return-to-zero and return-to-one handshaking. MWSCAS (2017)
P. Balasubramanian, Cuong Dang, Douglas L. Maskell, K. Prasad
Asynchronous Early Output Section-Carry Based Carry Lookahead Adder with Alias Carry Logic. CoRR (2017)
P. Balasubramanian, K. Prasad
Latency Optimized Asynchronous Early Output Ripple Carry Adder based on Delay-Insensitive Dual-Rail Data Encoding. CoRR (2017)
P. Balasubramanian, Cuong Dang, Douglas L. Maskell, K. Prasad
Approximate Ripple Carry and Carry Lookahead Adders - A Comparative Analysis. CoRR (2017)
P. Balasubramanian
A Critique on "Asynchronous Logic Implementation Based on Factorized DIMS". CoRR (2017)
P. Balasubramanian, Nikos E. Mastorakis
Design of Synchronous Section-Carry Based Carry Lookahead Adders with Improved Figure of Merit. CoRR (2016)
P. Balasubramanian, Nikos E. Mastorakis
An Asynchronous Early Output Full Adder and a Relative-Timed Ripple Carry Adder. CoRR (2016)
P. Balasubramanian, Nikos E. Mastorakis
System Reliability, Fault Tolerance and Design Metrics Tradeoffs in the Distributed Minority and Majority Voting Based Redundancy Scheme. CoRR (2016)
P. Balasubramanian, Shigeru Yamashita
Area/latency optimized early output asynchronous full adders and relative-timed ripple carry adders. CoRR (2016)
P. Balasubramanian, K. Prasad, Nikos E. Mastorakis
A Fault Tolerance Improved Majority Voter for TMR System Architectures. CoRR (2016)
P. Balasubramanian, Nikos E. Mastorakis
FPGA Based Implementation of Distributed Minority and Majority Voting Based Redundancy for Mission and Safety-Critical Applications. CoRR (2016)
P. Balasubramanian
Comments on "Dual-rail asynchronous logic multi-level implementation". Integr. 52 (2016)
P. Balasubramanian, Nikos E. Mastorakis
Power, Delay and Area Comparisons of Majority Voters relevant to TMR Architectures. CoRR (2016)
P. Balasubramanian, K. Prasad
Early Output Hybrid Input Encoded Asynchronous Full Adder and Relative-Timed Ripple Carry Adder. CoRR (2016)
P. Balasubramanian, Nikos E. Mastorakis
ASIC-based Implementation of Synchronous Section-Carry Based Carry Lookahead Adders. CoRR (2016)
P. Balasubramanian, Nikos E. Mastorakis
Global versus Local Weak-Indication Self-Timed Function Blocks - A Comparative Analysis. CoRR (2016)
P. Balasubramanian, Douglas L. Maskell
A distributed minority and majority voting based redundancy scheme. Microelectron. Reliab. 55 (9-10) (2015)
P. Balasubramanian, Shigeru Yamashita
On the Error Resiliency of Combinational Logic Cells - Implications for Nano-based Digital Design. PRDC (2013)
P. Balasubramanian, David A. Edwards, William B. Toms
Self-Timed Section-Carry Based Carry Lookahead Adders and the Concept of Alias Logic. J. Circuits Syst. Comput. 22 (4) (2013)
P. Balasubramanian, David A. Edwards, William B. Toms
Redundant Logic Insertion and Latency Reduction in Self-Timed Adders. VLSI Design 2012 (2012)
P. Balasubramanian, Doug A. Edwards
Dual-Sum Single-Carry Self-Timed Adder Designs. ISVLSI (2009)
P. Balasubramanian, David A. Edwards, Charlie Brej
Self-timed full adder designs based on hybrid input encoding. DDECS (2009)
P. Balasubramanian, David A. Edwards
Efficient Realization of Strongly Indicating Function Blocks. ISVLSI (2008)
P. Balasubramanian, David A. Edwards
A New Design Technique for Weakly Indicating Function Blocks. DDECS (2008)