Shigeru Yamashita

ORCID

Publication Activity (10 Years)

Years Active: 1995-2024
Publications (10 Years): 56

Top Venues

IEICE Trans. Fundam. Electron. Commun. Comput. Sci.

VLSI Design

IEICE Trans. Inf. Syst.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Ryosuke Matsuo, Rudy Raymond, Shigeru Yamashita, Shin-ichi Minato
Optimizing Decision Diagrams for Measurements of Quantum Circuits. ASPDAC (2024)
Yuto Arimura, Shigeru Yamashita
Efficient Realization of an SC Circuit with Feedback and Its Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 107 (7) (2024)
David Clarino, Shohei Kuroda, Shigeru Yamashita
Using S Gates and Relative Phase Toffoli Gates to Improve T-Count in Quantum Boolean Circuits. ISMVL (2023)
Kyohei Seino, Shigeru Yamashita
An SMT-Solver-Based Synthesis of NNA-Compliant Quantum Circuits Consisting of CNOT, H and T Gates. ASP-DAC (2023)
David Clarino, Naoya Asada, Shigeru Yamashita
Optimizing LUT-Based Quantum Circuit Synthesis Using Relative Phase Boolean Operations. ICCAD (2023)
Atsushi Matsuo, Shigeru Yamashita, Daniel J. Egger
A SAT Approach to the Initial Mapping Problem in SWAP Gate Insertion for Commuting Gates. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 106 (11) (2023)
Tomohisa Kawakami, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
A Deep Reinforcement Learning-based Routing Algorithm for Unknown Erroneous Cells in DMFBs. NEWCAS (2023)
Atsushi Matsuo, Yudai Suzuki, Ikko Hamamura, Shigeru Yamashita
Enhancing VQE Convergence for Optimization Problems with Problem-Specific Parameterized Quantum Circuits. IEICE Trans. Inf. Syst. 106 (11) (2023)
Atsushi Matsuo, Wakaki Hattori, Shigeru Yamashita
An Efficient Method to Decompose and Map MPMCT Gates That Accounts for Qubit Placement. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 106 (2) (2023)
Kaito Mori, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
A Fast Approach to Droplet Routing with Shape-Dependent Velocity on MEDA Biochips. NEWCAS (2023)
Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
Multi-Droplet Routing based on a Shape-Dependent Velocity Model on MEDA Biochips. ICEIC (2023)
Yuji Wada, Shigeru Yamashita
Minimizing the Impact of Unbalanced Splitting Errors on DMFBs Without Any Overhead. DSD (2023)
Tomohisa Kawakami, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
A Deep Reinforcement Learning Approach to Droplet Routing for Erroneous Digital Microfluidic Biochips. Sensors 23 (21) (2023)
Masataka Hirai, Debraj Kundu, Shigeru Yamashita, Sudip Roy, Hiroyuki Tomiyama
Transport-Free Placement of Mixers for Realizing Bioprotocol on Programmable Microfluidic Devices. VLSID (2023)
Ikuru Yoshida, Shigeru Yamashita
Making General Dilution Graphs Robust to Unbalanced-Split Errors on Digital Microfluidic Biochips. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 106 (2) (2023)
Debraj Kundu, Venkata Lavanya Sarvasiddi, Sukanta Bhattacharjee, Shigeru Yamashita, Sudip Roy
Preparing Fluid Samples Under Retention Time Constraints Using Flow-Based Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (9) (2023)
Shohei Kuroda, Shigeru Yamashita
Optimization of Quantum Boolean Circuits by Relative-Phase Toffoli Gates. RC (2022)
Yifang Bao, Shigeru Yamashita, Bing Li, Tsung-Yi Ho
Mixer-Based Washing Methods for Programmable Microfluidic Devices. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (10) (2022)
Syoki Kawaminami, Yukino Watanabe, Shigeru Yamashita
Approximating stochastic numbers to reduce latency. it Inf. Technol. 64 (3) (2022)
Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita, Sudip Roy
Shape-Dependent Velocity Based Droplet Routing on MEDA Biochips. IEEE Access 10 (2022)
Katsuhiro Ichikawa, Shigeru Yamashita
A Multiply Accumulator for Stochastic Numbers Without Scaling Errors. VLSI Design (2021)
Debraj Kundu, Jitendra Giri, Sataru Maruyama, Sudip Roy, Shigeru Yamashita
Fluid-to-cell assignment and fluid loading on programmable microfluidic devices for bioprotocol execution. Integr. 78 (2021)
Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita
Minimization of Routing Area in MEDA Biochips. BioCAS (2021)
Atsushi Matsuo, Wakaki Hattori, Shigeru Yamashita
Dynamical Decomposition and Mapping of MPMCT Gates to Nearest Neighbor Architectures. ASP-DAC (2021)
Shuaijie Ying, Sudip Roy, Juinn-Dar Huang, Shigeru Yamashita
Design for Restricted-Area and Fast Dilution using Programmable Microfluidic Device based Lab-on-a-Chip. DSD (2021)
Shoki Kawaminami, Shigeru Yamashita
Triple-Rail Stochastic Number and Its Applications. ISOCC (2021)
Soma Esaki, Shigeru Yamashita
Reducing T-count When Decomposing Many MPMCT Gates Simultaneously. ISMVL (2020)
Yiran Chen, Deliang Fan, Yanzhi Wang, Shigeru Yamashita
Editorial for the special issue on disruptive computing technologies. CCF Trans. High Perform. Comput. 2 (3) (2020)
Gautam Choudhary, Sandeep Pal, Debraj Kundu, Sukanta Bhattacharjee, Shigeru Yamashita, Bing Li, Ulf Schlichtmann, Sudip Roy
Transport-Free Module Binding for Sample Preparation using Microfluidic Fully Programmable Valve Arrays. DATE (2020)
Satoru Maruyama, Debraj Kundu, Shigeru Yamashita, Sudip Roy
Optimization of Fluid Loading on Programmable Microfluidic Devices for Bio-protocol Execution. ASP-DAC (2020)
Yudai Sakamoto, Shigeru Yamashita
Efficient Methods to Generate Constant SNs with Considering Trade-Off between Error and Overhead and Its Evaluation. IEICE Trans. Inf. Syst. (2) (2020)
Jingwen Ding, Shigeru Yamashita
Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D Architecture and Its Application to Large-Scale Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (5) (2020)
Atsushi Matsuo, Shigeru Yamashita
An Efficient Method for Quantum Circuit Placement Problem on a 2-D Grid. RC (2019)
Kota Asai, Shigeru Yamashita
Compaction of Topological Quantum Circuits by Modularization. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2019)
Atsushi Matsuo, Wakaki Hattori, Shigeru Yamashita
Reducing the Overhead of Mapping Quantum Circuits to IBM Q System. ISCAS (2019)
Chin-Heng Liu, Chia-Chun Lin, Yung-Chih Chen, Chia-Cheng Wu, Chun-Yao Wang, Shigeru Yamashita
Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (12) (2019)
Kenta Shirane, Takahiro Yamamoto, Ittetsu Taniguchi, Yuko Hara-Azumi, Shigeru Yamashita, Hiroyuki Tomiyama
Maximum Error-Aware Design of Approximate Array Multipliers. ISOCC (2019)
Yudai Sakamoto, Shigeru Yamashita
Reducing the Overhead of Stochastic Number Generators Without Increasing Error. VLSI Design (2019)
Ankur Gupta, Juinn-Dar Huang, Shigeru Yamashita, Sudip Roy
Design Automation for Dilution of a Fluid Using Programmable Microfluidic Device-Based Biochips. ACM Trans. Design Autom. Electr. Syst. 24 (2) (2019)
Wakaki Hattori, Shigeru Yamashita
Mapping a Quantum Circuit to 2D Nearest Neighbor Architecture by Changing the Gate Order. IEICE Trans. Inf. Syst. (11) (2019)
Kang-Yi Fan, Shigeru Yamashita, Juinn-Dar Huang
Reactant Minimization for Multi-Target Sample Preparation on Digital Microfluidic Biochips Using Network Flow Models. VLSI-DAT (2019)
Nurul Ain Binti Adnan, Shigeru Yamashita
Logical Qubit Layout Problem for ICM Representation. J. Inf. Process. 26 (2018)
Wakaki Hattori, Shigeru Yamashita
Quantum Circuit Optimization by Changing the Gate Order for 2D Nearest Neighbor Architectures. RC (2018)
Nurul Ain Binti Adnan, Shigeru Yamashita, Alan Mishchenko
Reduction of Quantum Cost by Making Temporary Changes to the Function. IEICE Trans. Inf. Syst. (7) (2017)
Ritsuko Muguruma, Shigeru Yamashita
Stochastic Number Generation with the Minimum Inputs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (8) (2017)
Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi
A Systematic Methodology for Design and Worst-Case Error Analysis of Approximate Array Multipliers. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (7) (2017)
Shigeru Yamashita, Tsung-Yi Ho, Robert Wille, Krishnendu Chakrabarty
Microfluidic Biochips: Bridging Biochemistry with Computer Science and Engineering (NII Shonan Meeting 2017-1). NII Shonan Meet. Rep. 2017 (2017)
Ritsuko Muguruma, Shigeru Yamashita
Stochastic Number Generation with Few Inputs. VLSI Design (2016)
Tsung-Yi Ho, Shigeru Yamashita, Ansuman Banerjee, Sudip Roy
Design of Microfluidic Biochips: Connecting Algorithms and Foundations of Chip Design to Biochemistry and the Life Sciences. VLSI Design (2016)
Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho
A Full-Flexibility-Guaranteed Pin-Count Reduction Design for General-Purpose Digital Microfluidic Biochips. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2016)
Andris Ambainis, Kazuo Iwama, Masaki Nakanishi, Harumichi Nishimura, Rudy Raymond, Seiichiro Tani, Shigeru Yamashita
Quantum Query Complexity of Almost All Functions with Fixed On-set Size. Comput. Complex. 25 (4) (2016)
Abhimanyu Yadav, Trung Anh Dinh, Daiki Kitagawa, Shigeru Yamashita
ILP-based Synthesis for Sample Preparation Applications on Digital Microfluidic Biochips. VLSI Design (2016)
Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi
A systematic methodology for design and analysis of approximate array multipliers. APCCAS (2016)
Jason Helge Anderson, Yuko Hara-Azumi, Shigeru Yamashita
Effect of LFSR seeding, scrambling and feedback polynomial on stochastic computing accuracy. DATE (2016)
P. Balasubramanian, Shigeru Yamashita
Area/latency optimized early output asynchronous full adders and relative-timed ripple carry adders. CoRR (2016)
Nurul Ain Binti Adnan, Kouhei Kushida, Shigeru Yamashita
A pre-optimization technique to generate initial reversible circuits with low quantum cost. ISCAS (2016)
Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Krishnendu Chakrabarty
A general testing method for digital microfluidic biochips under physical constraints. ITC (2015)
Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho
An Optimal Pin-Count Design With Logic Optimization for Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (4) (2015)
Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Krishnendu Chakrabarty
Testing of digital microfluidic biochips with arbitrary layouts. ETS (2015)
Nurul Ain Binti Adnan, Shigeru Yamashita, Simon J. Devitt, Kae Nemoto
2D Qubit Layout Optimization for Topological Quantum Computation. RC (2014)
Hiroaki Yoshida, Masayuki Wakizaka, Shigeru Yamashita, Masahiro Fujita
An Energy-Efficient Patchable Accelerator and Its Design Methods. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2014)
Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho
A network-flow-based optimal sample preparation algorithm for digital microfluidic biochips. ASP-DAC (2014)
Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho
A logic integrated optimal pin-count design for digital microfluidic biochips. DATE (2014)
Shunichi Sanae, Yuko Hara-Azumi, Shigeru Yamashita, Yasuhiko Nakashima
Better-Than-DMR Techniques for Yield Improvement. FCCM (2014)
Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication. IEICE Trans. Inf. Syst. (1) (2013)
P. Balasubramanian, Shigeru Yamashita
On the Error Resiliency of Combinational Logic Cells - Implications for Nano-based Digital Design. PRDC (2013)
Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Yuko Hara-Azumi
A clique-based approach to find binding and scheduling result in flow-based microfluidic biochips. ASP-DAC (2013)
Tanvir Ahmed, Jun Yao, Yuko Hara-Azumi, Shigeru Yamashita, Yasuhiko Nakashima
Selective Check of Data-Path for Effective Fault Tolerance. IEICE Trans. Inf. Syst. (8) (2013)
Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Yuko Hara-Azumi
Clique-Based Architectural Synthesis of Flow-Based Microfluidic Biochips. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2013)
Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication. Electron. Colloquium Comput. Complex. 19 (2012)
Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
Quantum Walks on the Line with Phase Parameters. IEICE Trans. Inf. Syst. (3) (2012)
Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication CoRR (2012)
Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication. TAMC (2012)
Shigeru Yamashita, Shin-ichi Minato, D. Michael Miller
Synthesis of Semi-Classical Quantum Circuits. J. Multiple Valued Log. Soft Comput. 18 (1) (2012)
Hratch Mangassarian, Hiroaki Yoshida, Andreas G. Veneris, Shigeru Yamashita, Masahiro Fujita
On error tolerance and Engineering Change with Partially Programmable Circuits. ASP-DAC (2012)
Richard Cleve, Kazuo Iwama, François Le Gall, Harumichi Nishimura, Seiichiro Tani, Junichi Teruyama, Shigeru Yamashita
Reconstructing Strings from Substrings with Quantum Queries. SWAT (2012)
Richard Cleve, Kazuo Iwama, François Le Gall, Harumichi Nishimura, Seiichiro Tani, Junichi Teruyama, Shigeru Yamashita
Reconstructing Strings from Substrings with Quantum Queries CoRR (2012)
Shigeru Yamashita
An Optimization Problem for Topological Quantum Computation. Asian Test Symposium (2012)
Masayuki Wakizaka, Hiroaki Yoshida, Yuko Hara-Azumi, Shigeru Yamashita
A redundant wire addition method for Patchable Accelerator. ICECS (2012)
Yuichi Hirata, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
An efficient conversion of quantum circuits to a linear nearest neighbor architecture. Quantum Inf. Comput. 11 (1&2) (2011)
Atsushi Matsuo, Shigeru Yamashita
Changing the Gate Order for Optimal LNN Conversion. RC (2011)
Hiroshi Aoki, Shigeru Yamashita, Shin-ichi Minato
An efficient algorithm for constructing a Sequence Binary Decision Diagram representing a set of reversed sequences. GrC (2011)
Shigeru Yamashita, Igor L. Markov
Fast equivalence - checking for quantum circuits. Quantum Inf. Comput. 10 (9&10) (2010)
Shigeru Yamashita, Igor L. Markov
Fast equivalence-checking for quantum circuits. NANOARCH (2010)
Seiichiro Tani, Masaki Nakanishi, Shigeru Yamashita
Multi-Party Quantum Communication Complexity with Routed Messages. IEICE Trans. Inf. Syst. (2) (2009)
Andris Ambainis, Kazuo Iwama, Masaki Nakanishi, Harumichi Nishimura, Rudy Raymond, Seiichiro Tani, Shigeru Yamashita
Average/Worst-Case Gap of Quantum Query Complexities by On-Set Size CoRR (2009)
Shigeru Yamashita, Igor L. Markov
Fast Equivalence-checking for Quantum Circuits. CoRR (2009)
Yumi Nakajima, Yasuhito Kawano, Hiroshi Sekigawa, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
Synthesis of quantum circuits for d-level systems by using cosine-sine decomposition. Quantum Inf. Comput. 9 (5&6) (2009)
Shigeru Yamashita, Shin-ichi Minato, D. Michael Miller
An efficient verification of quantum circuits under a practical restriction. CIT (2008)
Andris Ambainis, Kazuo Iwama, Masaki Nakanishi, Harumichi Nishimura, Rudy Raymond, Seiichiro Tani, Shigeru Yamashita
Quantum Query Complexity of Boolean Functions with Small On-Sets. ISAAC (2008)
Shigeru Yamashita, Shin-ichi Minato, D. Michael Miller
DDMF: An Efficient Decision Diagram Structure for Design Verification of Quantum Circuits under a Practical Restriction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2008)
Seiichiro Tani, Masaki Nakanishi, Shigeru Yamashita
Multi-party Quantum Communication Complexity with Routed Messages. COCOON (2008)
Kazuo Iwama, Harumichi Nishimura, Mike Paterson, Rudy Raymond, Shigeru Yamashita
Polynomial-Time Construction of Linear Network Coding. ICALP (1) (2008)
Kouki Suzuki, Takashi Nakada, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
A Functional Unit with Small Variety of Highly Reliable Cells. PRDC (2008)
Shigeru Yamashita, Masaki Nakanishi
A practical framework to utilize quantum search. IEEE Congress on Evolutionary Computation (2007)
Kazuo Iwama, Harumichi Nishimura, Rudy Raymond, Shigeru Yamashita
Unbounded-Error Classical and Quantum Communication Complexity. ISAAC (2007)
Masahito Hayashi, Kazuo Iwama, Harumichi Nishimura, Rudy Raymond Harry Putra, Shigeru Yamashita
Quantum Network Coding. STACS (2007)
Shinya Hiramoto, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
A Hardware SAT Solver Using Non-chronological Backtracking and Clause Recording Without Overheads. ARC (2007)
Tomoya Suzuki, Shigeru Yamashita, Masaki Nakanishi, Katsumasa Watanabe
Robust Quantum Algorithms Computing OR with epsilon-Biased Oracles. IEICE Trans. Inf. Syst. (2) (2007)
Andris Ambainis, Kazuo Iwama, Akinori Kawachi, Rudy Raymond, Shigeru Yamashita
Improved algorithms for quantum identification of Boolean oracles. Theor. Comput. Sci. 378 (1) (2007)

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Publication Activity (10 Years)

Top Topics

Top Venues

Shigeru Yamashita