Chun-Yao Wang

ORCID

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 47

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

ASP-DAC

DATE

SoCC

Publications

Wuqian Tang, Yi-Ting Li, Kai-Po Hsu, Kuan-Ling Chou, You-Cheng Lin, Chia-Feng Chien, Tzu-Li Hsu, Yung-Chih Chen, Ting-Chi Wang, Shih-Chieh Chang, TingTing Hwang, Chun-Yao Wang
A Hybrid Approach to Reverse Engineering on Combinational Circuits. DATE (2024)
Pei-Pei Chen, Xiang-Min Yang, Yu-Cheng He, Yung-Chih Chen, Yi-Ting Li, Chun-Yao Wang
LOOPLock 3.0: A Robust Cyclic Logic Locking Approach. ASPDAC (2024)
Yong-Fong Chang, Yung-Chih Chen, Yu-Chen Cheng, Shu-Hong Lin, Che-Hsu Lin, Chun-Yuan Chen, Yu-Hsuan Chen, Yu-Che Lee, Jia-Wei Lin, Hsun-Wei Pao, Shih-Chieh Chang, Yi-Ting Li, Chun-Yao Wang
IR drop Prediction Based on Machine Learning and Pattern Reduction. ACM Great Lakes Symposium on VLSI (2024)
Hsin-Ping Yen, Shiuan-Hau Huang, Yan-Hsiu Liu, Kuang-Hsien Tseng, Ji-Fu Kung, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
A Flexible Cluster Tool Simulation Framework with Wafer Batch Dispatching Time Recommendation. ISQED (2023)
Meng-Jing Li, Yu-Chuan Yen, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
A Constructive Approach for Threshold Function Identification. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Takashi Sato, Chun-Yao Wang, Yu-Guang Chen, Tsung-Wei Huang
Invited Paper: Overview of 2023 CAD Contest at ICCAD. ICCAD (2023)
Hsiao-Lun Liu, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
A Robust Approach to Detecting Non-Equivalent Quantum Circuits Using Specially Designed Stimuli. ASP-DAC (2023)
Chun-Ting Lee, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
Approximate Logic Synthesis by Genetic Algorithm with an Error Rate Guarantee. ASP-DAC (2023)
Pei-Pei Chen, Xiang-Min Yang, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
An Approach to Unlocking Cyclic Logic Locking: LOOPLock 2.0. ICCAD (2022)
Chang-Cheng Ko, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
Majority Logic Circuit Minimization Using Node Addition and Removal. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (3) (2022)
Chia-Chun Lin, Ciao-Syun Lin, You-Hsuen Tsai, Yung-Chih Chen, Chun-Yao Wang
Don't Care Computation and De Morgan Transformation for Threshold Logic Network Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (5) (2022)
Xiang-Min Yang, Pei-Pei Chen, Hsiao-Yu Chiang, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (1) (2022)
Hsiao-Lun Liu, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
A Don't-Care-Based Approach to Reducing the Multiplicative Complexity in Logic Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Yu-Guang Chen, Chun-Yao Wang, Tsung-Wei Huang, Takashi Sato
Overview of 2022 CAD Contest at ICCAD. ICCAD (2022)
Chia-Cheng Wu, Yi-Hsiang Hu, Chia-Chun Lin, Yung-Chih Chen, Juinn-Dar Huang, Chun-Yao Wang
Diagnosis for Reconfigurable Single-Electron Transistor Arrays with a More Generalized Defect Model. ACM J. Emerg. Technol. Comput. Syst. 17 (2) (2021)
Yi-Ting Lin, Chun-Jui Chen, Pei-Yi Kuo, Si-Huei Lee, Chia-Chun Lin, Yun-Ju Lee, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
An IMU-aided Fitness System. SoCC (2021)
Hsin-Tsung Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
On Synthesizing Memristor-Based Logic Circuits in Area-Constrained Crossbar Arrays. ISQED (2021)
Wen-Chih Hsu, Chia-Chun Lin, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
On Reduction of Computations for Threshold Function Identification. SoCC (2021)
Chun-Yao Wang, Ying-Jen Chen, Chen-Fu Chien
Industry 3.5 to empower smart production for poultry farming and an empirical study for broiler live weight prediction. Comput. Ind. Eng. 151 (2021)
Chia-Chun Lin, Hsin-Ping Yen, Sheng-Hsiu Wei, Pei-Pei Chen, Yung-Chih Chen, Chun-Yao Wang
A General Equivalence Checking Framework for Multivalued Logic. ASP-DAC (2021)
Tsung-Wei Huang, Yu-Guang Chen, Chun-Yao Wang, Takashi Sato
Overview of 2021 CAD Contest at ICCAD. ICCAD (2021)
Kit Seng Tam, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
An Efficient Approximate Node Merging with an Error Rate Guarantee. ASP-DAC (2021)
Shiuan-Hau Huang, Hsin-Ping Yen, Yan-Hsiu Liu, Kuang-Hsien Tseng, Ji-Fu Kung, Chia-Chun Lin, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang
Cluster Tool Performance Analysis using Graph Database. SoCC (2021)
Teng-Chia Wang, Yan-Ping Chang, Chun-Jui Chen, Yun-Ju Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
IMU-based Smart Knee Pad for Walking Distance and Stride Count Measurement. ISQED (2020)
Hsiao-Yu Chiang, Yung-Chih Chen, De-Xuan Ji, Xiang-Min Yang, Chia-Chun Lin, Chun-Yao Wang
LOOPLock: Logic Optimization-Based Cyclic Logic Locking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Ya-Chun Chang, Chia-Chun Lin, Yi-Ting Lin, Yung-Chih Chen, Chun-Yao Wang
A Convolutional Result Sharing Approach for Binarized Neural Network Inference. DATE (2020)
Chia-Chun Lin, Kit Seng Tam, Chana-Cheng Ko, Hsin-Ping Yen, Shenz-Hsiu Wei, Yung-Chih Chen, Chun-Yao Wang
A Dynamic Expansion Order Algorithm for the SAT-based Minimization. SoCC (2020)
Chia-Chun Lin, Chin-Heng Liu, Yung-Chih Chen, Chun-Yao Wang
A New Necessary Condition for Threshold Function Identification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Chun-Jui Chen, Yi-Ting Lin, Chia-Chun Lin, Yung-Chih Chen, Yun-Ju Lee, Chun-Yao Wang
Rehabilitation System for Limbs using IMUs. ISQED (2020)
Chin-Heng Liu, Chia-Chun Lin, Yung-Chih Chen, Chia-Cheng Wu, Chun-Yao Wang, Shigeru Yamashita
Threshold Function Identification by Redundancy Removal and Comprehensive Weight Assignments. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (12) (2019)
Yan-Ping Chang, Teng-Chia Wang, Yun-Ju Lee, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
A Smart Single-Sensor Device for Instantaneously Monitoring Lower Limb Exercises. SoCC (2019)
De-Xuan Ji, Hsiao-Yu Chiang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
A Glitch Key-Gate for Logic Locking. SoCC (2019)
Yung-Chih Chen, Wei-An Ji, Chih-Chung Wang, Ching-Yi Huang, Chia-Cheng Wu, Chia-Chun Lin, Chun-Yao Wang
Using range-equivalent circuits for facilitating bounded sequential equivalence checking. VLSI-DAT (2018)
Chia-Cheng Wu, Tung-Yuan Lee, Yung-An Lai, Hsin-Pei Wang, De-Xuan Ji, Yan-Ping Chang, Teng-Chia Wang, Chin-Heng Liu, Chun-Yao Wang, Yung-Chih Chen
A Hybrid Approach to Equivalent Fault Identification for Verification Environment Qualification. ACM Great Lakes Symposium on VLSI (2018)
Chia-Cheng Wu, Kung-Han Ho, Juinn-Dar Huang, Chun-Yao Wang
Architecture Exploration and Delay Minimization Synthesis for SET-Based Programmable Gate Arrays. ISVLSI (2018)
Hsin-Pei Wang, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
On Synthesizing Memristor-Based Logic Circuits With Minimal Operational Pulses. IEEE Trans. Very Large Scale Integr. Syst. 26 (12) (2018)
Yung-An Lai, Chia-Chun Lin, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang
Efficient synthesis of approximate threshold logic circuits with an error rate guarantee. DATE (2018)
Tung-Yuan Lee, Chia-Cheng Wu, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang
Logic optimization with considering boolean relations. DATE (2018)
Chun-Che Chung, Yung-Chih Chen, Chun-Yao Wang, Chia-Cheng Wu
Majority logic circuits optimisation by node merging. ASP-DAC (2017)
Ying-Chin Lin, Chun-Yao Wang, Jing-Yun Zeng
A case study on mathematical expression recognition to GPU. J. Supercomput. 73 (8) (2017)
Yun-Jui Li, Ching-Yi Huang, Chia-Cheng Wu, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan
Dynamic Diagnosis for Defective Reconfigurable Single-Electron Transistor Arrays. IEEE Trans. Very Large Scale Integr. Syst. 25 (4) (2017)
Chia-Chun Lin, Chiao-Wei Huang, Chun-Yao Wang, Yung-Chih Chen
In&Out: Restructuring for threshold logic network optimization. ISQED (2017)
Tai-Lin Chen, Chun-Yao Wang, Ching-Yi Huang, Yung-Chih Chen
An Efficient Interpolation-Based Projected Sum of Product Decomposition via Genetic Algorithm. J. Multiple Valued Log. Soft Comput. 27 (1) (2016)
Ching-Yi Huang, Yun-Jui Li, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan
Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor Arrays. IEEE Trans. Very Large Scale Integr. Syst. 24 (6) (2016)
Chen-Yu Lin, Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang, Chiou-Ting Hsu
Minimization of Number of Neurons in Voronoi Diagram-Based Artificial Neural Networks. IEEE Trans. Multi Scale Comput. Syst. 2 (4) (2016)
Ching-Hsuan Ho, Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang, Suman Datta, Vijaykrishnan Narayanan
Area-Aware Decomposition for Single-Electron Transistor Arrays. ACM Trans. Design Autom. Electr. Syst. 21 (4) (2016)
Yu-Min Chou, Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang
MajorSat: A SAT solver to majority logic. ASP-DAC (2016)
Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan
Synthesis for Width Minimization in the Single-Electron Transistor Array. IEEE Trans. Very Large Scale Integr. Syst. 23 (12) (2015)
Wan-Chen Weng, Yung-Chih Chen, Jui-Hung Chen, Ching-Yi Huang, Chun-Yao Wang
Using structural relations for checking combinationality of cyclic circuits. DATE (2015)
Ching-Yi Huang, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan
A defect-aware approach for mapping reconfigurable Single-Electron Transistor arrays. ASP-DAC (2015)
Chen-Hsuan Lin, Subhendu Roy, Chun-Yao Wang, David Z. Pan, Deming Chen
CSL: Coordinated and scalable logic synthesis techniques for effective NBTI reduction. ICCD (2015)
Ching-Yi Huang, Zheng-Shan Yu, Yung-Chun Hu, Tung-Chen Tsou, Chun-Yao Wang, Yung-Chih Chen
Correctness Analysis and Power Optimization for Probabilistic Boolean Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (4) (2015)
Jui-Hung Chen, Yung-Chih Chen, Wan-Chen Weng, Ching-Yi Huang, Chun-Yao Wang
Synthesis and verification of cyclic combinational circuits. SoCC (2015)
Chian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan
Width minimization in the Single-Electron Transistor array synthesis. DATE (2014)
Yu-Liang Hsu, Pau-Choo Chung, Wei-Hsin Wang, Ming-Chyi Pai, Chun-Yao Wang, Chien-Wen Lin, Hao-Li Wu, Jeen-Shing Wang
Gait and Balance Analysis for Patients With Alzheimer's Disease Using an Inertial-Sensor-Based Wearable Instrument. IEEE J. Biomed. Health Informatics 18 (6) (2014)
Chia-Chun Lin, Chun-Yao Wang, Yung-Chih Chen, Ching-Yi Huang
Rewiring for threshold logic circuit minimization. DATE (2014)
Zheng Zhao, Chian-Wei Liu, Chun-Yao Wang, Weikang Qian
BDD-based synthesis of reconfigurable single-electron transistor arrays. ICCAD (2014)
Wei-Hsin Wang, Yu-Liang Hsu, Ming-Chyi Pai, Cheng-Hsiung Wang, Chun-Yao Wang, Chien-Wen Lin, Hao-Li Wu, Pau-Choo Chung
Alzheimer's disease classification based on gait information. IJCNN (2014)
Yung-Chih Chen, Chun-Yao Wang, Ching-Yi Huang
Verification of Reconfigurable Binary Decision Diagram-Based Single-Electron Transistor Arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (10) (2013)
Chen-Kuan Tsai, Chun-Yao Wang, Ching-Yi Huang, Yung-Chih Chen
Sensitization criterion for threshold logic circuits and its application. ICCAD (2013)
Chang-En Chiang, Li-Fu Tang, Chun-Yao Wang, Ching-Yi Huang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan
On reconfigurable single-electron transistor arrays synthesis using reordering techniques. DATE (2013)
Yen-Chi Yang, Chun-Yao Wang, Ching-Yi Huang, Yung-Chih Chen
Pattern generation for Mutation Analysis using Genetic Algorithms. ISCAS (2013)
Yung-Chih Chen, Soumya Eachempati, Chun-Yao Wang, Suman Datta, Yuan Xie, Vijaykrishnan Narayanan
A Synthesis Algorithm for Reconfigurable Single-Electron Transistor Arrays. ACM J. Emerg. Technol. Comput. Syst. 9 (1) (2013)
Daniel J. Buehrer, Chun-Yao Wang
Deco: A Decentralized, Cooperative Atomic Commit Protocol. J. Comput. Networks Commun. 2012 (2012)
Daniel J. Buehrer, Chun-Yao Wang
CA-ABAC: Class Algebra Attribute-Based Access Control. Web Intelligence/IAT Workshops (2012)
Yung-Chih Chen, Chun-Yao Wang
Logic Restructuring Using Node Addition and Removal. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (2) (2012)
Ching-Yi Huang, Daw-Ming Lee, Chun-Chi Lin, Chun-Yao Wang
Error Injection & Correction: An efficient formal logic restructuring algorithm. ISOCC (2012)
Hsiu-Yi Lin, Chun-Yao Wang, Shih-Chieh Chang, Yung-Chih Chen, Hsuan-Ming Chou, Ching-Yi Huang, Yen-Chi Yang, Chun-Chien Shen
A probabilistic analysis method for functional qualification under Mutation Analysis. DATE (2012)
Pau-Choo Chung, Yu-Liang Hsu, Chun-Yao Wang, Chien-Wen Lin, Jeen-Shing Wang, Ming-Chyi Pai
Gait analysis for patients with Alzheimer'S disease using a triaxial accelerometer. ISCAS (2012)
Yung-Chih Chen, Soumya Eachempati, Chun-Yao Wang, Suman Datta, Yuan Xie, Vijaykrishnan Narayanan
Automated mapping for reconfigurable single-electron transistor arrays. DAC (2011)
Yen-An Chen, Chun-Yao Wang, Ching-Yi Huang, Hsiu-Yi Lin
A register-transfer level testability analyzer. SoCC (2011)
Pin-Yi Kuo, Chun-Yao Wang, Ching-Yi Huang
On rewiring and simplification for canonicity in threshold logic circuits. ICCAD (2011)
Yung-Chih Chen, Chun-Yao Wang
Node addition and removal in the presence of don't cares. DAC (2010)
Yung-Chih Chen, Chun-Yao Wang
Fast Node Merging With Don't Cares Using Logic Implications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (11) (2010)
Daniel J. Buehrer, Chun-Yao Wang, Li-Ren Chien
The Cadabia Cloud. ISPA (2010)
Daniel J. Buehrer, Chun-Yao Wang
Distributed Transactions for Semantic Web Workflows - Overcoming the CAP Limitations on Virtual Organizations. ISPA (2010)
Chen-Hsuan Lin, Chun-Yao Wang, Yung-Chih Chen
Dependent-Latch Identification in Reachable State Space. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (8) (2009)
Meng-Syue Chan, Chun-Yao Wang, Yung-Chih Chen
An efficient approach to sip design integration. ISQED (2009)
Yi-Ling Liu, Chun-Yao Wang, Yung-Chih Chen, Ya-Hsin Chang
A novel ACO-based pattern generation for peak power estimation in VLSI circuits. ISQED (2009)
Chun-Chi Lin, Chun-Yao Wang
Rewiring using IRredundancy Removal and Addition. DATE (2009)
Yung-Chih Chen, Chun-Yao Wang
Fast detection of node mergers using logic implications. ICCAD (2009)
Yung-Chih Chen, Chun-Yao Wang
Enhancing SAT-based sequential depth computation by pruning search space. ACM Great Lakes Symposium on VLSI (2009)
Chen-Hsuan Lin, Chun-Yao Wang
Dependent latch identification in the reachable state space. ASP-DAC (2009)
Chuang-Chi Chiou, Chun-Yao Wang, Yung-Chih Chen
A Statistic-Based Approach to Testability Analysis. ISQED (2008)
Shih-Chieh Wu, Chun-Yao Wang, Yung-Chih Chen
Novel Probabilistic Combinational Equivalence Checking. IEEE Trans. Very Large Scale Integr. Syst. 16 (4) (2008)
Chun-Yao Wang, Daniel J. Buehrer
A Ring-Based Decentralized Collaborative Non-blocking Atomic Commit Protocol. IAT (2008)
Geeng-Wei Lee, Juinn-Dar Huang, Chun-Yao Wang, Jing-Yang Jou
Verification of Pin-Accurate Port Connections. IEEE Des. Test Comput. 25 (5) (2008)
Yung-Chih Chen, Chun-Yao Wang
An Implicit Approach to Minimizing Range-Equivalent Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (11) (2008)
Min-Lun Chuang, Chun-Yao Wang
Synthesis of reversible sequential elements. ACM J. Emerg. Technol. Comput. Syst. 3 (4) (2008)
Tsung-Lin Lee, Chun-Yao Wang
Recognition of Fanout-free Functions. ASP-DAC (2007)
Yu-Min Kuo, Cheng-Hung Lin, Chun-Yao Wang, Shih-Chieh Chang, Pei-Hsin Ho
Intelligent Random Vector Generator Based on Probability Analysis of Circuit Structure. ISQED (2007)
Min-Lun Chuang, Chun-Yao Wang
Synthesis of Reversible Sequential Elements. ASP-DAC (2007)
Wen-Wen Hsieh, Po-Yuan Chen, Chun-Yao Wang, TingTing Hwang
A Bus-Encoding Scheme for Crosstalk Elimination in High-Performance Processor Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (12) (2007)
Yi-Le Huang, Chun-Yao Wang, Richard Yeh, Shih-Chieh Chang, Yung-Chih Chen
Language-Based High Level Transaction Extraction on On-chip Buses. ISQED (2006)
Ming-Hong Su, Chun-Yao Wang
High level equivalence symmetric input identification. ASP-DAC (2006)
Shih-Chieh Wu, Chun-Yao Wang, Jan-an Hsieh
The Potential and Limitation of Probability-Based Combinational Equivalence Checking. ATS (2006)
Shih-Chieh Wu, Chun-Yao Wang
PEACH: A Novel Architecture for Probabilistic Combinational Equivalence Checking. VLSI-SoC (2006)
Yung-Chih Chen, Chun-Yao Wang
An Improved Approach for AlternativeWires Identi.cation. ICCD (2005)
Daniel J. Buehrer, Chun-Yao Wang
Using a Class Algebra Ontology To Define Conversions between OWL/SQL/Java Beans. Web Intelligence (2004)
Chen-Ling Chou, Chun-Yao Wang, Geeng-Wei Lee, Jing-Yang Jou
Graph Automorphism-Based Algorithm for Determining Symmetric Inputs. ICCD (2004)

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Publication Activity (10 Years)

Top Topics

Top Venues

Chun-Yao Wang