Login / Signup
A Bus-Encoding Scheme for Crosstalk Elimination in High-Performance Processor Design.
Wen-Wen Hsieh
Po-Yuan Chen
Chun-Yao Wang
TingTing Hwang
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2007)
Keyphrases
</>
encoding scheme
high speed
single chip
parallel processing
computer architecture
genetic algorithm
computation intensive
functional verification
neural network
data structure