Shih-Chieh Chang

ORCID

Publication Activity (10 Years)

Years Active: 1992-2024
Publications (10 Years): 52

Top Venues

CoRR

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

DATE

Publications

Jian-Wei Su, Pei-Jung Lu, Ping-Chun Wu, Yen-Chi Chou, Ta-Wei Liu, Yen-Lin Chung, Li-Yang Hung, Jin-Sheng Ren, Wei-Hsing Huang, Chih-Han Chien, Peng-I Mei, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Hao-Chiao Hong, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang
8-Bit Precision 6T SRAM Compute-in-Memory Macro Using Global Bitline-Combining Scheme for Edge AI Chips. IEEE Trans. Circuits Syst. II Express Briefs 71 (4) (2024)
Wuqian Tang, Yi-Ting Li, Kai-Po Hsu, Kuan-Ling Chou, You-Cheng Lin, Chia-Feng Chien, Tzu-Li Hsu, Yung-Chih Chen, Ting-Chi Wang, Shih-Chieh Chang, TingTing Hwang, Chun-Yao Wang
A Hybrid Approach to Reverse Engineering on Combinational Circuits. DATE (2024)
Ping-Chun Wu, Jian-Wei Su, Yen-Lin Chung, Li-Yang Hong, Jin-Sheng Ren, Fu-Chun Chang, Yuan Wu, Ho-Yu Chen, Chen-Hsun Lin, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Shih-Chieh Chang, Wei-Chung Lo, Chih-I Wu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang
An 8b-Precision 6T SRAM Computing-in-Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips. IEEE J. Solid State Circuits 59 (7) (2024)
Yan-Cheng Guo, Tian-Sheuan Chang, Chih-Sheng Lin, Bo-Cheng Chiou, Chih-Ming Lai, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang
CIMR-V: An End-to-End SRAM-based CIM Accelerator with RISC-V for AI Edge Device. ISCAS (2024)
Ping-Chun Wu, Jian-Wei Su, Li-Yang Hong, Jin-Sheng Ren, Chih-Han Chien, Ho-Yu Chen, Chao-En Ke, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang
A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips. IEEE J. Solid State Circuits 59 (1) (2024)
Yong-Fong Chang, Yung-Chih Chen, Yu-Chen Cheng, Shu-Hong Lin, Che-Hsu Lin, Chun-Yuan Chen, Yu-Hsuan Chen, Yu-Che Lee, Jia-Wei Lin, Hsun-Wei Pao, Shih-Chieh Chang, Yi-Ting Li, Chun-Yao Wang
IR drop Prediction Based on Machine Learning and Pattern Reduction. ACM Great Lakes Symposium on VLSI (2024)
Ming-Hung Wu, Ming-Chun Hong, Ching Shih, Yao-Jen Chang, Yu-Chen Hsin, Shih-Ching Chiu, Kuan-Ming Chen, Yi-Hui Su, Chih-Yao Wang, Shan-Yi Yang, Guan-Long Chen, Hsin-Han Lee, Sk. Ziaur Rahaman, I-Jung Wang, Chen-Yi Shih, Tsun-Chun Chang, Jeng-Hua Wei, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Tuo-Hung Hou
U-MRAM: Transistor-Less, High-Speed (10 ns), Low-Voltage (0.6 V), Field-Free Unipolar MRAM for High-Density Data Memory. VLSI Technology and Circuits (2023)
Chih-Tsun Huang, Juin-Ming Lu, Yao-Hua Chen, Ming-Chih Tung, Shih-Chieh Chang
Optimization of AI SoC with Compiler-assisted Virtual Design Platform. ISPD (2023)
Jian-Jia Huang, Shih-Chieh Chang, Cheng-Hsu Cheng, Timothy Wan, Yu-Cheng Pei
Gait Analysis in Powered Exoskeleton-Assisted Walking in Patients with Stroke: A Case Series Cohort. APSIPA ASC (2023)
Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, Ta-Wei Liu, Pei-Jung Lu, Ping-Chun Wu, Yen-Lin Chung, Li-Yang Hong, Jin-Sheng Ren, Tianlong Pan, Chuan-Jia Jhang, Wei-Hsing Huang, Chih-Han Chien, Peng-I Mei, Sih-Han Li, Shyh-Shyuan Sheu, Shih-Chieh Chang, Wei-Chung Lo, Chih-I Wu, Xin Si, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang
A 8-b-Precision 6T SRAM Computing-in-Memory Macro Using Segmented-Bitline Charge-Sharing Scheme for AI Edge Chips. IEEE J. Solid State Circuits 58 (3) (2023)
Tay-Jyi Lin, Yi-Hsuan Ting, Meng-Ze Hsu, Kuan-Han Lin, Chung-Ming Huang, Fu-Cheng Tsai, Shyh-Shyuan Sheu, Shih-Chieh Chang, Chingwei Yeh, Jinn-Shyan Wang
A 16 nm 140 TOPS/W 5 μJ/Inference Keyword Spotting Engine Based on 1D-BCNN. IEEE Trans. Circuits Syst. II Express Briefs 70 (12) (2023)
Ping-Chun Wu, Jian-Wei Su, Li-Yang Hong, Jin-Sheng Ren, Chih-Han Chien, Ho-Yu Chen, Chao-En Ke, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang
A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices. ISSCC (2023)
Ping-Chun Wu, Jian-Wei Su, Yen-Lin Chung, Li-Yang Hong, Jin-Sheng Ren, Fu-Chun Chang, Yuan Wu, Ho-Yu Chen, Chen-Hsun Lin, Hsu-Ming Hsiao, Sih-Han Li, Shyh-Shyuan Sheu, Shih-Chieh Chang, Wei-Chung Lo, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Chih-I Wu, Meng-Fan Chang
A 28nm 1Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns Latency, 1241GOPS and 37.01TOPS/W for 8b-MAC Operations for Edge-AI Devices. ISSCC (2022)
Zong-Han Lee, Fu-Cheng Tsai, Shih-Chieh Chang
Robust Binary Neural Network against Noisy Analog Computation. DATE (2022)
Chih-Sheng Lin, Fu-Cheng Tsai, Jian-Wei Su, Sih-Han Li, Tian-Sheuan Chang, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Chih-I Wu, Tuo-Hung Hou
A 48 TOPS and 20943 TOPS/W 512kb Computation-in-SRAM Macro for Highly Reconfigurable Ternary CNN Acceleration. A-SSCC (2021)
Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, Ta-Wei Liu, Pei-Jung Lu, Ping-Chun Wu, Yen-Lin Chung, Li-Yang Hung, Jin-Sheng Ren, Tianlong Pan, Sih-Han Li, Shih-Chieh Chang, Shyh-Shyuan Sheu, Wei-Chung Lo, Chih-I Wu, Xin Si, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang
16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips. ISSCC (2021)
Yi-Wen Hung, Yung-Chih Chen, Chi Lo, Austin Go So, Shih-Chieh Chang
Dynamic Workload Allocation for Edge Computing. IEEE Trans. Very Large Scale Integr. Syst. 29 (3) (2021)
Jian-Wei Su, Xin Si, Yen-Chi Chou, Ting-Wei Chang, Wei-Hsing Huang, Yung-Ning Tu, Ruhui Liu, Pei-Jung Lu, Ta-Wei Liu, Jing-Hong Wang, Zhixiao Zhang, Hongwu Jiang, Shanshi Huang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shyh-Shyuan Sheu, Sih-Han Li, Heng-Yuan Lee, Shih-Chieh Chang, Shimeng Yu, Meng-Fan Chang
15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips. ISSCC (2020)
Chieh-Yang Chen, Pei-Hsin Wang, Shih-Chieh Chang, Da-Cheng Juan, Wei Wei, Jia-Yu Pan
AirConcierge: Generating Task-Oriented Dialogue via Efficient Large-Scale Knowledge Retrieval. EMNLP (Findings) (2020)
Hsin-Ping Chou, Shih-Chieh Chang, Jia-Yu Pan, Wei Wei, Da-Cheng Juan
Remix: Rebalanced Mixup. CoRR (2020)
Xiang-Xiu Wu, Yi-Wen Hung, Yung-Chih Chen, Shih-Chieh Chang
Accuracy Tolerant Neural Networks Under Aggressive Power Optimization. DATE (2020)
Hsin-Ping Chou, Shih-Chieh Chang, Jia-Yu Pan, Wei Wei, Da-Cheng Juan
Remix: Rebalanced Mixup. ECCV Workshops (6) (2020)
Li-Huang Tsai, Shih-Chieh Chang, Yu-Ting Chen, Jia-Yu Pan, Wei Wei, Da-Cheng Juan
Calibrated BatchNorm: Improving Robustness Against Noisy Weights in Neural Networks. CoRR (2020)
Pei-Hsin Wang, Sheng-Iou Hsieh, Shih-Chieh Chang, Yu-Ting Chen, Jia-Yu Pan, Wei Wei, Da-Chang Juan
Contextual Temperature for Language Modeling. CoRR (2020)
Chu-Chien Wei, Li-Huang Tsai, Hsin-Ping Chou, Shih-Chieh Chang
Person Identification by Walking Gesture Using Skeleton Sequences. ACIVS (2020)
Hao-Yun Chen, Jhao-Hong Liang, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan
Improving Adversarial Robustness via Guided Complement Entropy. ICCV (2019)
Hao-Yun Chen, Pei-Hsin Wang, Chun-Hao Liu, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan
Complement Objective Training. ICLR (Poster) (2019)
Hao-Yun Chen, Pei-Hsin Wang, Chun-Hao Liu, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan
Complement Objective Training. CoRR (2019)
Hao-Yun Chen, Jhao-Hong Liang, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan
Improving Adversarial Robustness via Guided Complement Entropy. CoRR (2019)
Hao-Yun Chen, Li-Huang Tsai, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan
Learning with Hierarchical Complement Objective. CoRR (2019)
Chun-Hao Liu, Da-Cheng Juan, Xuan-An Tseng, Wei Wei, Yu-Ting Chen, Jia-Yu Pan, Shih-Chieh Chang
Hierarchical LSTM: Modeling Temporal Dynamics and Taxonomy in Location-Based Mobile Check-Ins. PAKDD (2) (2019)
Yun-Ting Wang, Kai-Chiang Wu, Chung-Han Chou, Shih-Chieh Chang
Aging-aware chip health prediction adopting an innovative monitoring strategy. ASP-DAC (2019)
An-Chieh Cheng, Jin-Dong Dong, Chi-Hung Hsu, Shu-Huan Chang, Min Sun, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan
Searching toward pareto-optimal device-aware neural architectures. ICCAD (2018)
Cheng-Hung Lin, Sze-Chen Cho, Shih-Chieh Chang
An Adaptive Mechanism for Designing Efficient Snoop Filters. IEEE Trans. Very Large Scale Integr. Syst. 26 (7) (2018)
Chi-Hung Hsu, Shu-Huan Chang, Da-Cheng Juan, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Shih-Chieh Chang
MONAS: Multi-Objective Neural Architecture Search using Reinforcement Learning. CoRR (2018)
Kai-Hsiang Hsu, Yung-Chih Chen, You-Luen Lee, Shih-Chieh Chang
Contactless Testing for Prebond Interposers. IEEE Trans. Very Large Scale Integr. Syst. 26 (6) (2018)
Chung-Han Chou, Tsui-Yun Chang, Kai-Chiang Wu, Shih-Chieh Chang
Sensor-Based Time Speculation in the Presence of Timing Variability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (6) (2018)
An-Chieh Cheng, Jin-Dong Dong, Chi-Hung Hsu, Shu-Huan Chang, Min Sun, Shih-Chieh Chang, Jia-Yu Pan, Yu-Ting Chen, Wei Wei, Da-Cheng Juan
Searching Toward Pareto-Optimal Device-Aware Neural Architectures. CoRR (2018)
Yu-Guang Chen, Michihiro Shintani, Takashi Sato, Yiyu Shi, Shih-Chieh Chang
Pattern based runtime voltage emergency prediction: An instruction-aware block sparse compressed sensing approach. ASP-DAC (2017)
Yin-Chi Peng, Chien-Chih Chen, Hsiang-Jen Tsai, Keng-Hao Yang, Pei-Zhe Huang, Shih-Chieh Chang, Wen-Ben Jone, Tien-Fu Chen
Leak Stopper: An Actively Revitalized Snoop Filter Architecture with Effective Generation Control. ACM Trans. Design Autom. Electr. Syst. 22 (3) (2017)
You-Luen Lee, Da-Cheng Juan, Xuan-An Tseng, Yu-Ting Chen, Shih-Chieh Chang
DC-Prophet: Predicting Catastrophic Machine Failures in DataCenters. ECML/PKDD (3) (2017)
Krishnendu Chakrabarty, Massimo Alioto, Bevan M. Baas, Chirn Chye Boon, Meng-Fan Chang, Naehyuck Chang, Yao-Wen Chang, Chip-Hong Chang, Shih-Chieh Chang, Poki Chen, Masud H. Chowdhury, Pasquale Corsonello, Ibrahim Abe M. Elfadel, Said Hamdioui, Masanori Hashimoto, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Rajiv V. Joshi, Tanay Karnik, Mehran Mozaffari Kermani, Chulwoo Kim, Tae-Hyoung Kim, Jaydeep P. Kulkarni, Eren Kursun, Erik Larsson, Hai (Helen) Li, Huawei Li, Patrick P. Mercier, Prabhat Mishra, Makoto Nagata, Arun S. Natarajan, Koji Nii, Partha Pratim Pande, Ioannis Savidis, Mingoo Seok, Sheldon X.-D. Tan, Mark M. Tehranipoor, Aida Todri-Sanial, Miroslav N. Velev, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Stacey Weber Jackson
Editorial. IEEE Trans. Very Large Scale Integr. Syst. 25 (1) (2017)
Chung-Han Chou, Yenting Lai, Yi-Chun Chang, Chih-Yu Wang, Liang-Chia Cheng, Shih-Hsu Huang, Shih-Chieh Chang
Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (1) (2017)
Kassan Unda, Chung-Han Chou, Shih-Chieh Chang, Cheng Zhuo, Yiyu Shi
CN-SIM: A cycle-accurate full system power delivery noise simulator. ASP-DAC (2017)
Chi Lo, Yu-Yi Su, Chun-Yi Lee, Shih-Chieh Chang
A Dynamic Deep Neural Network Design for Efficient Workload Allocation in Edge Computing. ICCD (2017)
You-Luen Lee, Da-Cheng Juan, Xuan-An Tseng, Yu-Ting Chen, Shih-Chieh Chang
DC-Prophet: Predicting Catastrophic Machine Failures in DataCenters. CoRR (2017)
Cheng-Hung Lin, Jin-Cheng Li, Chen-Hsiung Liu, Shih-Chieh Chang
Perfect Hashing Based Parallel Algorithms for Multiple String Matching on Graphic Processing Units. IEEE Trans. Parallel Distributed Syst. 28 (9) (2017)
Yi-Hsuan Ting, Chih-Yang Wang, Yu-Sian Chang, Tay-Jyi Lin, Shih-Chieh Chang, Jinn-Shyan Wang
Overoptimistic voltage scaling in pre-error AVS systems and learning-based alleviation. SoCC (2016)
Travis E. Schulze, Kevin A. Kwiat, Charles A. Kamhoua, Shih-Chieh Chang, Yiyu Shi
RECORD: Temporarily Randomized Encoding of COmbinational Logic for Resistance to Data Leakage from hardware Trojan. AsianHOST (2016)
Hsuan-Ming Chou, Yi-Chiao Chen, Keng-Hao Yang, Jean Tsao, Shih-Chieh Chang, Wen-Ben Jone, Tien-Fu Chen
High-Performance Deadlock-Free ID Assignment for Advanced Interconnect Protocols. IEEE Trans. Very Large Scale Integr. Syst. 24 (3) (2016)
Yu-Guang Chen, Wan-Yu Wen, Yun-Ting Wang, You-Luen Lee, Shih-Chieh Chang
A novel low-cost dynamic logic reconfigurable structure strategy for low power optimization. ASP-DAC (2016)
Chung-Han Chou, Hua-Hsin Yeh, Shih-Hsu Huang, Yow-Tyng Nieh, Shih-Chieh Chang, Yung-Tai Chang
Skew Minimization With Low Power for Wide-Voltage-Range Multipower-Mode Designs. IEEE Trans. Very Large Scale Integr. Syst. 24 (3) (2016)
Hsuan-Ming Chou, Hong-Chang Wu, Yi-Chiao Chen, Jean Tsao, Shih-Chieh Chang
Hybrid coverage assertions for efficient coverage analysis across simulation and emulation environments. ASP-DAC (2015)
Yu-Guang Chen, Wan-Yu Wen, Tao Wang, Yiyu Shi, Shih-Chieh Chang
Q-Learning Based Dynamic Voltage Scaling for Designs with Graceful Degradation. ISPD (2015)
Hsuan-Ming Chou, Ming-Yi Hsiao, Yi-Chiao Chen, Keng-Hao Yang, Jean Tsao, Chiao-Ling Lung, Shih-Chieh Chang, Wen-Ben Jone, Tien-Fu Chen
Soft-Error-Tolerant Design Methodology for Balancing Performance, Power, and Reliability. IEEE Trans. Very Large Scale Integr. Syst. 23 (9) (2015)
Yu-Guang Chen, Wan-Yu Wen, Yiyu Shi, Wing-Kai Hon, Shih-Chieh Chang
Novel Spare TSV Deployment for 3-D ICs Considering Yield and Timing Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (4) (2015)
Ping-Huang Tsai, Shih-Chieh Chang, Fang-Chun Liu, Jen-Ho Tsao, Yung-Hung Wang, Men-Tzung Lo
A Novel Application of Multiscale Entropy in Electroencephalography to Predict the Efficacy of Acetylcholinesterase Inhibitor in Alzheimer's Disease. Comput. Math. Methods Medicine 2015 (2015)
Mac Y. C. Kao, Kun-Ting Tsai, Shih-Chieh Chang
A Fault Detection and Tolerance Architecture for Post-Silicon Skew Tuning. IEEE Trans. Very Large Scale Integr. Syst. 23 (7) (2015)
Boris Thies, Alexander Groos, Martin Schulz, Ching-Feng Li, Shih-Chieh Chang, Jörg Bendix
Frequency of Low Clouds in Taiwan Retrieved from MODIS Data and Its Relation to Cloud Forest Occurrence. Remote. Sens. 7 (10) (2015)
Jui-Hung Chien, Ruei-Siang Hsu, Hsueh-Ju Lin, Ka-Yi Yeh, Shih-Chieh Chang
Contactless Stacked-die Testing for Pre-bond Interposers. DAC (2014)
Hsuan-Ming Chou, Hong-Chang Wu, Yi-Chiao Chen, Shih-Chieh Chang
Concurrency-oriented SoC re-certification by reusing block-level test vectors. ISQED (2014)
Yu-Guang Chen, Tao Wang, Kuan-Yu Lai, Wan-Yu Wen, Yiyu Shi, Shih-Chieh Chang
Critical Path Monitor Enabled Dynamic Voltage Scaling for Graceful Degradation in Sub-Threshold Designs. DAC (2014)
Jui-Hung Chien, Hao Yu, Ruei-Siang Hsu, Hsueh-Ju Lin, Shih-Chieh Chang
Package geometric aware thermal analysis by infrared-radiation thermal images. DATE (2014)
Yu-Guang Chen, Kuan-Yu Lai, Ming-Chao Lee, Yiyu Shi, Wing-Kai Hon, Shih-Chieh Chang
Yield and timing constrained spare TSV assignment for three-dimensional integrated circuits. DATE (2014)
Wan-Yu Wen, Jin-Cheng Li, Sheng-Yuan Lin, Jing-Yi Chen, Shih-Chieh Chang
A Fuzzy-Matching Model With Grid Reduction for Lithography Hotspot Detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (11) (2014)
Cody Hao Yu, Chiao-Ling Lung, Yi-Lun Ho, Ruei-Siang Hsu, Ding-Ming Kwai, Shih-Chieh Chang
Thermal-Aware On-Line Scheduler for 3-D Many-Core Processor Throughput Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (5) (2014)
Yu-Guang Chen, Hui Geng, Kuan-Yu Lai, Yiyu Shi, Shih-Chieh Chang
Multibit Retention Registers for Power Gated Designs: Concept, Design, and Deployment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (4) (2014)
Jinn-Shyan Wang, Keng-Jui Chang, Chingwei Yeh, Shih-Chieh Chang
Embedding Repeaters in Silicon IPs for Cross-IP Interconnections. IEEE Trans. Very Large Scale Integr. Syst. 21 (3) (2013)
Cheng-Hung Lin, Chen-Hsiung Liu, Lung-Sheng Chien, Shih-Chieh Chang
Accelerating Pattern Matching Using a Novel Parallel Algorithm on GPUs. IEEE Trans. Computers 62 (10) (2013)
Wen-Tsuen Chen, Youn-Long Lin, Chen-Yi Lee, Jeng-Long Chiang, Meng-Fan Chang, Shih-Chieh Chang
Strengthening Modern Electronics Industry Through the National Program for Intelligent Electronics in Taiwan. IEEE Access 1 (2013)
Chung-Han Chou, Nien-Yu Tsai, Hao Yu, Yiyu Shi, Jui-Hung Chien, Shih-Chieh Chang
On the futility of thermal through-silicon-vias. VLSI-DAT (2013)
Chiao-Ling Lung, Yu-Shih Su, Hsih-Hsiu Huang, Yiyu Shi, Shih-Chieh Chang
Through-Silicon Via Fault-Tolerant Clock Networks for 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (7) (2013)
Sheng-Yuan Lin, Jing-Yi Chen, Jin-Cheng Li, Wan-Yu Wen, Shih-Chieh Chang
A novel fuzzy matching model for lithography hotspot detection. DAC (2013)
Wen-Pin Tu, Chung-Han Chou, Shih-Hsu Huang, Shih-Chieh Chang, Yow-Tyng Nieh, Chien-Yung Chou
Low-power timing closure methodology for ultra-low voltage designs. ICCAD (2013)
Ming-Chao Lee, Yiyu Shi, Shih-Chieh Chang
Efficient Wakeup Scheduling Considering Both Resource Usage and Timing Budget for Power Gating Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (7) (2012)
Shih-Hung Weng, Yu-Min Kuo, Shih-Chieh Chang
Timing Optimization in Sequential Circuit by Exploiting Clock-Gating Logic. ACM Trans. Design Autom. Electr. Syst. 17 (2) (2012)
Kai-Chiang Wu, Ming-Chao Lee, Diana Marculescu, Shih-Chieh Chang
Mitigating lifetime underestimation: A system-level approach considering temperature variations and correlations between failure mechanisms. DATE (2012)
Cheng-Hung Lin, Chen-Hsiung Liu, Shih-Chieh Chang, Wing-Kai Hon
Memory-efficient pattern matching architectures using perfect hashing on graphic processing units. INFOCOM (2012)
Mac Y. C. Kao, Kun-Ting Tsai, Hsuan-Ming Chou, Shih-Chieh Chang
Post silicon skew tuning: Survey and analysis. ASP-DAC (2012)
Hsiu-Yi Lin, Chun-Yao Wang, Shih-Chieh Chang, Yung-Chih Chen, Hsuan-Ming Chou, Ching-Yi Huang, Yen-Chi Yang, Chun-Chien Shen
A probabilistic analysis method for functional qualification under Mutation Analysis. DATE (2012)
Yu-Guang Chen, Yiyu Shi, Kuan-Yu Lai, Hui Geng, Shih-Chieh Chang
Efficient multiple-bit retention register assignment for power gated design: Concept and algorithms. ICCAD (2012)
Ming-Chao Lee, Yiyu Shi, Yu-Guang Chen, Diana Marculescu, Shih-Chieh Chang
Efficient on-line module-level wake-up scheduling for high performance multi-module designs. ISPD (2012)
Cheng-Hung Lin, Shih-Chieh Chang
Efficient Pattern Matching Algorithm for Memory Architecture. IEEE Trans. Very Large Scale Integr. Syst. 19 (1) (2011)
Ming-Chao Lee, Yu-Guang Chen, Ding-Kei Huang, Shih-Chieh Chang
NBTI-aware power gating design. ASP-DAC (2011)
Mac Y. C. Kao, Kun-Ting Tsai, Shih-Chieh Chang
A robust architecture for post-silicon skew tuning. ICCAD (2011)
Hsuan-Ming Chou, Hao Yu, Shih-Chieh Chang
Useful-skew clock optimization for multi-power mode designs. ICCAD (2011)
Kai-Chiang Wu, Diana Marculescu, Ming-Chao Lee, Shih-Chieh Chang
Analysis and mitigation of NBTI-induced performance degradation for power-gated circuits. ISLPED (2011)
Cheng-Hung Lin, Chen-Hsiung Liu, Shih-Chieh Chang
Accelerating Regular Expression Matching Using Hierarchical Parallel Machines on GPU. GLOBECOM (2011)
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska
Performance Optimization Using Variable-Latency Design Style. IEEE Trans. Very Large Scale Integr. Syst. 19 (10) (2011)
Chung-Han Chou, Nien-Yu Tsai, Hao Yu, Che-Rung Lee, Yiyu Shi, Shih-Chieh Chang
On the preconditioner of conjugate gradient method - A power grid simulation perspective. ICCAD (2011)
Chiao-Ling Lung, Jui-Hung Chien, Yiyu Shi, Shih-Chieh Chang
TSV fault-tolerant mechanisms with application to 3D clock networks. ISOCC (2011)
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu Shi, Shih-Chieh Chang
Fault-tolerant 3D clock network. DAC (2011)
Chiao-Ling Lung, Yi-Lun Ho, Ding-Ming Kwai, Shih-Chieh Chang
Thermal-aware on-line task allocation for 3D multi-core processor throughput optimization. DATE (2011)
Chiao-Ling Lung, Zi-Yi Zeng, Chung-Han Chou, Shih-Chieh Chang
Clock skew optimization considering complicated power modes. DATE (2010)
Cheng-Hung Lin, Sheng-Yu Tsai, Chen-Hsiung Liu, Shih-Chieh Chang, Jyuo-Min Shyu
Accelerating String Matching Using Multi-Threaded Algorithm on GPU. GLOBECOM (2010)
Yu-Shih Su, Wing-Kai Hon, Cheng-Chih Yang, Shih-Chieh Chang, Yeong-Jar Chang
Clock Skew Minimization in Multi-Voltage Mode Designs Using Adjustable Delay Buffers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (12) (2010)
Da-Cheng Juan, Yu-Ting Chen, Ming-Chao Lee, Shih-Chieh Chang
An Efficient Wake-Up Strategy Considering Spurious Glitches Phenomenon for Power Gating Designs. IEEE Trans. Very Large Scale Integr. Syst. 18 (2) (2010)
Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih-Chieh Chang
Synthesis of an efficient controlling structure for post-silicon clock skew minimization. ICCAD (2010)
Kuo-Chih Liao, Shih-Chieh Chang, Cheng-Yang Chiu, Yu-Hsiang Chou
of a Fiber-Optic Sensor for Continuous Glucose Monitoring from Canine Studies on Point Accuracy. Sensors 10 (8) (2010)
De-Shiuan Chiou, Yu-Ting Chen, Da-Cheng Juan, Shih-Chieh Chang
Sleep Transistor Sizing for Leakage Power Minimization Considering Temporal Correlation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (8) (2010)

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Shih-Chieh Chang