Yu-Shih Su

Publication Activity (10 Years)

Years Active: 2007-2013
Publications (10 Years): 0

Top Topics

Noise Detection

Adaptive Algorithms

High Availability

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Pei-Wen Luo, Chun Zhang, Yung-Tai Chang, Liang-Chia Cheng, Hung-Hsie Lee, Bih-Lan Sheu, Yu-Shih Su, Ding-Ming Kwai, Yiyu Shi
Benchmarking for research in power delivery networks of three-dimensional integrated circuits. ISPD (2013)
Chiao-Ling Lung, Yu-Shih Su, Hsih-Hsiu Huang, Yiyu Shi, Shih-Chieh Chang
Through-Silicon Via Fault-Tolerant Clock Networks for 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (7) (2013)
Tao Wang, Pei-Wen Luo, Yu-Shih Su, Liang-Chia Cheng, Ding-Ming Kwai, Yiyu Shi
Capturing the phantom of the power grid - on the runtime adaptive techniques for noise reduction. ASP-DAC (2012)
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska
Performance Optimization Using Variable-Latency Design Style. IEEE Trans. Very Large Scale Integr. Syst. 19 (10) (2011)
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu Shi, Shih-Chieh Chang
Fault-tolerant 3D clock network. DAC (2011)
Yu-Shih Su, Wing-Kai Hon, Cheng-Chih Yang, Shih-Chieh Chang, Yeong-Jar Chang
Clock Skew Minimization in Multi-Voltage Mode Designs Using Adjustable Delay Buffers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (12) (2010)
Yu-Shih Su, Wing-Kai Hon, Cheng-Chih Yang, Shih-Chieh Chang, Yeong-Jar Chang
Value assignment of adjustable delay buffers for clock skew minimization in multi-voltage mode designs. ICCAD (2009)
Yu-Shih Su, Po-Hsien Chang, Shih-Chieh Chang, TingTing Hwang
Synthesis of a novel timing-error detection architecture. ACM Trans. Design Autom. Electr. Syst. 13 (1) (2008)
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska
An Efficient Mechanism for Performance Optimization of Variable-Latency Designs. DAC (2007)