8-Bit Precision 6T SRAM Compute-in-Memory Macro Using Global Bitline-Combining Scheme for Edge AI Chips.
Jian-Wei SuPei-Jung LuPing-Chun WuYen-Chi ChouTa-Wei LiuYen-Lin ChungLi-Yang HungJin-Sheng RenWei-Hsing HuangChih-Han ChienPeng-I MeiSih-Han LiShyh-Shyuan SheuWei-Chung LoShih-Chieh ChangHao-Chiao HongChung-Chuan LoRen-Shuo LiuChih-Cheng HsiehKea-Tiong TangMeng-Fan ChangPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2024)
Keyphrases
- random access memory
- artificial intelligence
- design considerations
- edge detection
- power consumption
- protection scheme
- pseudorandom
- intelligent systems
- data transmission
- embedded dram
- high precision
- high speed
- case based reasoning
- knowledge representation
- expert systems
- high density
- computer systems
- bloom filter
- memory access
- pruning power