Login / Signup
Hsuan-Ming Chou
Publication Activity (10 Years)
Years Active: 2010-2016
Publications (10 Years): 3
Top Topics
Design Methodology
Subgraph Isomorphism
Deadlock Free
Fine Grained
Top Venues
ASP-DAC
IEEE Trans. Very Large Scale Integr. Syst.
ISQED
DATE
</>
Publications
</>
Hsuan-Ming Chou
,
Yi-Chiao Chen
,
Keng-Hao Yang
,
Jean Tsao
,
Shih-Chieh Chang
,
Wen-Ben Jone
,
Tien-Fu Chen
High-Performance Deadlock-Free ID Assignment for Advanced Interconnect Protocols.
IEEE Trans. Very Large Scale Integr. Syst.
24 (3) (2016)
Hsuan-Ming Chou
,
Hong-Chang Wu
,
Yi-Chiao Chen
,
Jean Tsao
,
Shih-Chieh Chang
Hybrid coverage assertions for efficient coverage analysis across simulation and emulation environments.
ASP-DAC
(2015)
Hsuan-Ming Chou
,
Ming-Yi Hsiao
,
Yi-Chiao Chen
,
Keng-Hao Yang
,
Jean Tsao
,
Chiao-Ling Lung
,
Shih-Chieh Chang
,
Wen-Ben Jone
,
Tien-Fu Chen
Soft-Error-Tolerant Design Methodology for Balancing Performance, Power, and Reliability.
IEEE Trans. Very Large Scale Integr. Syst.
23 (9) (2015)
Hsuan-Ming Chou
,
Hong-Chang Wu
,
Yi-Chiao Chen
,
Shih-Chieh Chang
Concurrency-oriented SoC re-certification by reusing block-level test vectors.
ISQED
(2014)
Mac Y. C. Kao
,
Kun-Ting Tsai
,
Hsuan-Ming Chou
,
Shih-Chieh Chang
Post silicon skew tuning: Survey and analysis.
ASP-DAC
(2012)
Hsiu-Yi Lin
,
Chun-Yao Wang
,
Shih-Chieh Chang
,
Yung-Chih Chen
,
Hsuan-Ming Chou
,
Ching-Yi Huang
,
Yen-Chi Yang
,
Chun-Chien Shen
A probabilistic analysis method for functional qualification under Mutation Analysis.
DATE
(2012)
Hsuan-Ming Chou
,
Hao Yu
,
Shih-Chieh Chang
Useful-skew clock optimization for multi-power mode designs.
ICCAD
(2011)
Yu-Chien Kao
,
Hsuan-Ming Chou
,
Kun-Ting Tsai
,
Shih-Chieh Chang
Synthesis of an efficient controlling structure for post-silicon clock skew minimization.
ICCAD
(2010)
Yu-Chien Kao
,
Hsuan-Ming Chou
,
Kun-Ting Tsai
,
Shih-Chieh Chang
An efficient phase detector connection structure for the skew synchronization system.
DAC
(2010)