Chung-Han Chou

Publication Activity (10 Years)

Years Active: 2010-2023
Publications (10 Years): 9

Top Topics

Noise Sensitivity

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

ACM Trans. Design Autom. Electr. Syst.

Publications

Chung-Han Chou, Chih-Jen (Jacky) Hsu, Chi-An (Rocky) Wu, Kuan-Hua Tu, Kei-Yong Khoo
Invited Paper: 2023 ICCAD CAD Contest Problem A: Multi-Bit Large-Scale Boolean Matching. ICCAD (2023)
Chung-Han Chou, Chih-Jen (Jacky) Hsu, Chi-An (Rocky) Wu, Kuan-Hua Tu
2022 CAD Contest Problem A: Learning Arithmetic Operations from Gate-Level Circuit. ICCAD (2022)
Yen-Chun Fang, Shao-Lun Huang, Chi-An Wu, Chung-Han Chou, Chih-Jen Hsu, WoeiTzy Jong, Kei-Yong Khoo
2021 CAD Contest Problem A: Functional ECO with Behavioral Change Guidance Invited Paper. ICCAD (2021)
Tien-Hung Tseng, Chung-Han Chou, Kai-Chiang Wu
Making Aging Useful by Recycling Aging-induced Clock Skew. ACM Trans. Design Autom. Electr. Syst. 25 (2) (2020)
Yun-Ting Wang, Kai-Chiang Wu, Chung-Han Chou, Shih-Chieh Chang
Aging-aware chip health prediction adopting an innovative monitoring strategy. ASP-DAC (2019)
Chung-Han Chou, Tsui-Yun Chang, Kai-Chiang Wu, Shih-Chieh Chang
Sensor-Based Time Speculation in the Presence of Timing Variability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (6) (2018)
Chung-Han Chou, Yenting Lai, Yi-Chun Chang, Chih-Yu Wang, Liang-Chia Cheng, Shih-Hsu Huang, Shih-Chieh Chang
Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (1) (2017)
Kassan Unda, Chung-Han Chou, Shih-Chieh Chang, Cheng Zhuo, Yiyu Shi
CN-SIM: A cycle-accurate full system power delivery noise simulator. ASP-DAC (2017)
Chung-Han Chou, Hua-Hsin Yeh, Shih-Hsu Huang, Yow-Tyng Nieh, Shih-Chieh Chang, Yung-Tai Chang
Skew Minimization With Low Power for Wide-Voltage-Range Multipower-Mode Designs. IEEE Trans. Very Large Scale Integr. Syst. 24 (3) (2016)
Chung-Han Chou, Nien-Yu Tsai, Hao Yu, Yiyu Shi, Jui-Hung Chien, Shih-Chieh Chang
On the futility of thermal through-silicon-vias. VLSI-DAT (2013)
Wen-Pin Tu, Chung-Han Chou, Shih-Hsu Huang, Shih-Chieh Chang, Yow-Tyng Nieh, Chien-Yung Chou
Low-power timing closure methodology for ultra-low voltage designs. ICCAD (2013)
Chung-Han Chou, Nien-Yu Tsai, Hao Yu, Che-Rung Lee, Yiyu Shi, Shih-Chieh Chang
On the preconditioner of conjugate gradient method - A power grid simulation perspective. ICCAD (2011)
Chiao-Ling Lung, Zi-Yi Zeng, Chung-Han Chou, Shih-Chieh Chang
Clock skew optimization considering complicated power modes. DATE (2010)