Poki Chen

Publication Activity (10 Years)

Years Active: 1991-2023
Publications (10 Years): 15

Top Topics

Pulse Width Modulation

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE J. Solid State Circuits

Publications

Ping-Hung Yin, Chih-Wen Lu, Jia-Shyang Wang, Yuan-Chang Chien, Cheng-Te Chou, Guo-Dung John Su, Poki Chen
A 216 × 216 Global-Shutter CMOS Image Sensor With Embedded Analog Memory and Automatic Exposure Control for Under-Display Optical Fingerprint Sensing Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (3) (2023)
Poki Chen, Joshua Adiel Wijaya, Seiji Kajihara, Trio Adiono, Hsiang-Yu Chen, Ruei-Ting Wang, Yousuke Miyake
A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection. IEEE Access 10 (2022)
Yu-Bang Chang, Chieh Tsai, Chang Hong Lin, Poki Chen
Real-Time Semantic Segmentation with Dual Encoder and Self-Attention Mechanism for Autonomous Driving. Sensors 21 (23) (2021)
Pei-Yi Lai Lee, Ya-Wen Yang, Sih-Han Li, Jian-Jhih Sun, Tzu Yi Hung, Chih-Wen Lu, Yen-Hsiang Fang, Wei-Hung Kuo, Li-Chun Huang, Guo-Dung John Su, Poki Chen
A 1280 x 720 Micro-LED Display Driver with 10-Bit Current-Mode Pulse Width Modulation. A-SSCC (2021)
Hsuan-Lun Kuo, Chih-Wen Lu, Poki Chen
An 18.39 fJ/Conversion-Step 1-MS/s 12-bit SAR ADC With Non-Binary Multiple-LSB-Redundant and Non-Integer-and-Split-Capacitor DAC. IEEE Access 9 (2021)
Ping-Hung Yin, Chih-Wen Lu, Jia-Shyang Wang, Keng-Li Chang, Fu-Kuo Lin, Poki Chen
A 368 × 184 Optical Under-Display Fingerprint Sensor Comprising Hybrid Arrays of Global and Rolling Shutter Pixels With Shared Pixel-Level ADCs. IEEE J. Solid State Circuits 56 (3) (2021)
Nguyen My Qui, Chang Hong Lin, Poki Chen
Design and Implementation of a 256-Bit RISC-V-Based Dynamically Scheduled Very Long Instruction Word on FPGA. IEEE Access 8 (2020)
Poki Chen, Yung-Hsuan Chen, John Carl Joel S. Marquez, Ruei-Ting Wang, Jiann-Jong Chen, Yuh-Shyan Hwang
Low Flicker Dimmable Multichannel LED Driver With Matrix-Style DPWM and Precise Current Matching. IEEE Trans. Very Large Scale Integr. Syst. 28 (11) (2020)
Poki Chen, Jian-Ting Lan, Ruei-Ting Wang, Nguyen My Qui, John Carl Joel S. Marquez, Seiji Kajihara, Yousuke Miyake
High-Precision PLL Delay Matrix With Overclocking and Double Data Rate for Accurate FPGA Time-to-Digital Converters. IEEE Trans. Very Large Scale Integr. Syst. 28 (4) (2020)
Chih-Wen Lu, Pei-Yi Lai Lee, You-Gang Chang, Xing-Wei Huang, Jhih-Siou Cheng, Po-Yu Tseng, Chih-Hsien Chou, Poki Chen, Tsin-Yuan Chang, Jenny Yi-Chun Liu
A 10-bit 1026-Channel Column Driver IC With Partially Segmented Piecewise Linear Digital-to-Analog Converters for UHD TFT-LCDs With One Billion Color Display. IEEE J. Solid State Circuits 54 (10) (2019)
Yousuke Miyake, Seiji Kajihara, Poki Chen
On-Chip Test Clock Validation Using A Time-to-Digital Converter in FPGAs. ITC-Asia (2019)
Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. 27 (2) (2019)
Tao-Chun Yu, Shao-Yun Fang, Chia-Ching Chen, Yulong Sun, Poki Chen
Device Array Layout Synthesis With Nonlinear Gradient Compensation for a High-Accuracy Current-Steering DAC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (4) (2018)
Poki Chen, Ya-Yun Hsiao, Yi-Su Chung, Wei Xiang Tsai, Jhih-Min Lin
A 2.5-ps Bin Size and 6.7-ps Resolution FPGA Time-to-Digital Converter Based on Delay Wrapping and Averaging. IEEE Trans. Very Large Scale Integr. Syst. 25 (1) (2017)
Krishnendu Chakrabarty, Massimo Alioto, Bevan M. Baas, Chirn Chye Boon, Meng-Fan Chang, Naehyuck Chang, Yao-Wen Chang, Chip-Hong Chang, Shih-Chieh Chang, Poki Chen, Masud H. Chowdhury, Pasquale Corsonello, Ibrahim Abe M. Elfadel, Said Hamdioui, Masanori Hashimoto, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Rajiv V. Joshi, Tanay Karnik, Mehran Mozaffari Kermani, Chulwoo Kim, Tae-Hyoung Kim, Jaydeep P. Kulkarni, Eren Kursun, Erik Larsson, Hai (Helen) Li, Huawei Li, Patrick P. Mercier, Prabhat Mishra, Makoto Nagata, Arun S. Natarajan, Koji Nii, Partha Pratim Pande, Ioannis Savidis, Mingoo Seok, Sheldon X.-D. Tan, Mark M. Tehranipoor, Aida Todri-Sanial, Miroslav N. Velev, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Stacey Weber Jackson
Editorial. IEEE Trans. Very Large Scale Integr. Syst. 25 (1) (2017)
Poki Chen, Hsien-Chih Liu, Ya-Wen Yang, Ya-Ying Li, Fajar Budiman
A multi-channel high precision current matching LED Driver for intelligent dimming. ISPACS (2015)
Poki Chen, Yi-Jiang Hu, Jian-Cheng Liou, Bo-Chang Ren
A 486k S/s CMOS time-domain smart temperature sensor with -0.85°C/0.78°C voltage-calibrated error. ISCAS (2015)
Poki Chen, Shou-Chih Chen, You-Sheng Shen, You-Jyun Peng
All-Digital Time-Domain Smart Temperature Sensor With an Inter-Batch Inaccuracy of -0.7~°C - +0.6~°C After One-Point Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2011)
Poki Chen, Chun-Chi Chen, Yu-Han Peng, Kai-Ming Wang, Yu-Shin Wang
A Time-Domain SAR Smart Temperature Sensor With Curvature Compensation and a 3σ Inaccuracy of -0.4°C ∼ +0.6°C Over a 0°C to 90°C Range. IEEE J. Solid State Circuits 45 (3) (2010)
Poki Chen, Po-Yu Chen, Juan-Shan Lai, Yi-Jin Chen
FPGA Vernier Digital-to-Time Converter With 1.58 ps Resolution and 59.3 Minutes Operation Range. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2010)
Poki Chen, Ting-Chun Liu
Switching Schemes for Reducing Capacitor Mismatch Sensitivity of Quasi-Passive Cyclic DAC. IEEE Trans. Circuits Syst. II Express Briefs (1) (2009)
Poki Chen, Juan-Shan Lai, Po-Yu Chen
A FPGA vernier digital-to-time converter with 3.56ps resolution and -0.23∼+0.2LSB inaccuracy. CICC (2008)
Poki Chen, Kai-Ming Wang, Yu-Han Peng, Yu-Shin Wang, Chun-Chi Chen
A time-domain SAR smart temperature sensor with -0.25∼+0.35°C inaccuracy for on-chip monitoring. ESSCIRC (2008)
Poki Chen, Mon-Chau Shie, Zhi-Yuan Zheng, Zi-Fan Zheng, Chun-Yan Chu
A Fully Digital Time-Domain Smart Temperature Sensor Realized With 140 FPGA Logic Elements. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2007)
Poki Chen, Chun-Chi Chen, Tuo-Kuang Chen, Shi-Wei Chen
A Time Domain Mixed-Mode Temperature Sensor with Digital Set-Point Programming. CICC (2006)
Chun-Chi Chen, Wen-Fu Lu, Chin-Chung Tsai, Poki Chen
A time-to-digital-converter-based CMOS smart temperature sensor. ISCAS (1) (2005)
Poki Chen, Jia-Chi Zheng, Chun-Chi Chen
A monolithic vernier-based time-to-digital converter with dual PLLs for self-calibration. CICC (2005)
Poki Chen, Chun-Chi Chen, Chin-Chung Tsai, Wen-Fu Lu
A time-to-digital-converter-based CMOS smart temperature sensor. IEEE J. Solid State Circuits 40 (8) (2005)
Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao
A wide-range and fast-locking clock synthesizer IP based on delay-locked loop. ISCAS (1) (2004)
Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao
A high-resolution and fast-conversion time-to-digital converter. ISCAS (1) (2003)
Poki Chen, Shen-Iuan Liu
A cyclic CMOS time-to-digital converter with deep sub-nanosecond resolution. CICC (1999)
Poki Chen, Jin-Fu Chang
An improved transmission protocol for two interfering queues in packet radio networks. IEEE Trans. Commun. 39 (3) (1991)