Chorng-Sii Hwang

Publication Activity (10 Years)

Years Active: 2003-2020
Publications (10 Years): 3

Top Topics

Achieving High Accuracy

Added Advantage

Processor Array

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Chun-Chi Chen, Chorng-Sii Hwang, Kai-Hsiang Chang
All-Digital Cost-Efficient CMOS Digital-to-Time Converter Using Binary-Weighted Pulse Expansion. IEEE Trans. Very Large Scale Integr. Syst. 28 (4) (2020)
Ting-Li Chu, Sin-Hong Yu, Chorng-Sii Hwang
Corrigendum to "High-Accuracy Programmable Timing Generator with Wide-Range Tuning Capability". VLSI Design 2017 (2017)
Ting-Li Chu, Wen-Yu Chu, Yasuyoshi Fujii, Chorng-Sii Hwang
All-digital deskew buffer using a hybrid control scheme. SoCC (2015)
Chorng-Sii Hwang, Ting-Li Chu, Wen-Cheng Chen
A clock generator based on multiplying delay-locked loop. SoCC (2014)
Chun-Chi Chen, Shih-Hao Lin, Chorng-Sii Hwang
An Area-Efficient CMOS Time-to-Digital Converter Based on a Pulse-Shrinking Scheme. IEEE Trans. Circuits Syst. II Express Briefs (3) (2014)
Chorng-Sii Hwang, Ting-Li Chu, Po-Hsun Chen
DLL-based programmable clock multiplier using differential toggle-pulsed latch. SoCC (2013)
Wei-Lung Mao, Chorng-Sii Hwang, Chung-Wen Hung, Jyh Sheen, Po-Hung Chen
Unambiguous BPSK-like CSC method for Galileo acquisition. MMAR (2013)
Ting-Li Chu, Sin-Hong Yu, Chorng-Sii Hwang
High-Accuracy Programmable Timing Generator with Wide-Range Tuning Capability. VLSI Design 2013 (2013)
You-Gang Chen, Hen-Wai Tsao, Chorng-Sii Hwang
A Fast-Locking All-Digital Deskew Buffer With Duty-Cycle Correction. IEEE Trans. Very Large Scale Integr. Syst. 21 (2) (2013)
Ting-Li Chu, Sin-Hong Yu, Chorng-Sii Hwang
High-accuracy programmable timing generator with wide-range tuning capability. ISPACS (2012)
Chorng-Sii Hwang, Chun-Yung Cho, Chung-Chun Chen, Hen-Wai Tsao
Dual-band CDR using a half-rate linear phase detector. SoCC (2009)
Chorng-Sii Hwang, Huan-Chun Li, Hen-Wai Tsao
A spread spectrum clock generator using digital modulation scheme. SoCC (2008)
Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao
A wide-range and fast-locking clock synthesizer IP based on delay-locked loop. ISCAS (1) (2004)
Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao
A high-resolution and fast-conversion time-to-digital converter. ISCAS (1) (2003)