Login / Signup

An Area-Efficient CMOS Time-to-Digital Converter Based on a Pulse-Shrinking Scheme.

Chun-Chi ChenShih-Hao LinChorng-Sii Hwang
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2014)
Keyphrases
  • low cost
  • circuit design
  • high speed
  • power consumption
  • databases
  • neural network
  • computationally efficient
  • input output
  • low power