Mark Zwolinski

ORCID

Publication Activity (10 Years)

Years Active: 1990-2024
Publications (10 Years): 43

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IVSW

CoRR

DATE

Publications

Bing Xue, Mark Zwolinski
Using Formal Verification to Evaluate Single Event Upsets in a RISC-V Core. CoRR (2024)
Xiao Liu, Mark Zwolinski, Basel Halak
SEA Cache: A Performance-Efficient Countermeasure for Contention-based Attacks. CoRR (2024)
Mark Zwolinski
Session details: Session 4A: Testing, Reliability and Fault Tolerance. ACM Great Lakes Symposium on VLSI (2022)
Xiao Liu, Mark Zwolinski
Mitigating Cache Contention-Based Attacks by Logical Associativity. PRIME (2022)
Bing Xue, Mark Zwolinski
Using Formal Methods to Evaluate Hardware Reliability in the Presence of Soft Errors. PRIME (2022)
Haider Muhi Abbas, Basel Halak, Mark Zwolinski
Learning-based BTI stress estimation and mitigation in multi-core processor systems. Microprocess. Microsystems 81 (2021)
Mohd Syafiq Mispan, Basel Halak, Mark Zwolinski
A Survey on the Susceptibility of PUFs to Invasive, Semi-Invasive and Noninvasive Attacks: Challenges and Opportunities for Future Directions. J. Circuits Syst. Comput. 30 (11) (2021)
Ibrahim A. Bello, Basel Halak, Mohammed El-Hajjar, Mark Zwolinski
VLSI Implementation of a Fully-Pipelined K-Best MIMO Detector with Successive Interference Cancellation. Circuits Syst. Signal Process. 38 (10) (2019)
Mohd Syafiq Mispan, Shengyu Duan, Basel Halak, Mark Zwolinski
A reliable PUF in a dual function SRAM. Integr. 68 (2019)
Haibo Su, Basel Halak, Mark Zwolinski
Two-Stage Architectures for Resilient Lightweight PUFs. IVSW (2019)
Miao Yu, Basel Halak, Mark Zwolinski
Using Hardware Performance Counters to Detect Control Hijacking Attacks. IVSW (2019)
Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. 27 (2) (2019)
Mohd Syafiq Mispan, Haibo Su, Mark Zwolinski, Basel Halak
Cost-efficient design for modeling attacks resistant PUFs. DATE (2018)
Shengyu Duan, Basel Halak, Mark Zwolinski
Cell Flipping with Distributed Refresh for Cache Ageing Minimization. ATS (2018)
Haibo Su, Mark Zwolinski, Basel Halak
A Machine Learning Attacks Resistant Two Stage Physical Unclonable Functions Design. IVSW (2018)
Sonal Yadav, Vijay Laxmi, Hemangee K. Kapoor, Manoj Singh Gaur, Mark Zwolinski
A Power Efficient Crossbar Arbitration in Multi-NoC for Multicast and Broadcast Traffic. iSES (2018)
Mohd Syafiq Mispan, Shengyu Duan, Basel Halak, Mark Zwolinski
A Reliable PUF in a Dual Function SRAM. PATMOS (2018)
Shengyu Duan, Mark Zwolinski, Basel Halak
Lifetime Reliability-Aware Digital Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 26 (11) (2018)
Lai Leng Woo, Mark Zwolinski, Basel Halak
Early detection of system-level anomalous behaviour using hardware performance counters. DATE (2018)
Gaole Sai, Basel Halak, Mark Zwolinski
Multi-Path Aging Sensor for Cost-Efficient Delay Fault Prediction. IEEE Trans. Circuits Syst. II Express Briefs (4) (2018)
Ibrahim A. Bello, Basel Halak, Mohammed El-Hajjar, Mark Zwolinski
Hardware Implementation of a Low-Power K-Best MIMO Detector Based on a Hybrid Merge Network. PATMOS (2018)
Shengyu Duan, Basel Halak, Mark Zwolinski
An ageing-aware digital synthesis approach. SMACD (2017)
Haider Muhi Abbas, Basel Halak, Mark Zwolinski
BTI mitigation by anti-ageing software patterns. Microelectron. Reliab. 79 (2017)
Elena Lai Leng Woo, Mark Zwolinski, Basel Halak
Hardware performance counters for system reliability monitoring. IVSW (2017)
Gaole Sai, Basel Halak, Mark Zwolinski
A cost-efficient delay-fault monitor. ISCAS (2017)
Enrico Fraccaroli, Francesco Stefanni, Franco Fummi, Mark Zwolinski
Fault analysis in analog circuits through language manipulation and abstraction. FDL (2017)
Mohd Syafiq Mispan, Basel Halak, Mark Zwolinski
Lightweight obfuscation techniques for modeling attacks resistant PUFs. IVSW (2017)
Enrico Fraccaroli, Francesco Stefanni, Franco Fummi, Mark Zwolinski
Fault Analysis in Analog Circuits Through Language Manipulation and Abstraction. FDL (Selected Papers) (2017)
Yang Lin, Mark Zwolinski, Basel Halak
A Low-Cost, Radiation-Hardened Method for Pipeline Protection in Microprocessors. IEEE Trans. Very Large Scale Integr. Syst. 24 (5) (2016)
Mark Zwolinski, Manoj Singh Gaur, Vijay Laxmi, Usha Sandeep Mehta
Guest Editorial. IET Comput. Digit. Tech. 10 (5) (2016)
Niyati Gupta, Ashish Sharma, Vijay Laxmi, Manoj Singh Gaur, Mark Zwolinski, Rimpy Bishnoi
LBDR: generic congestion handling routing implementation for two-dimensional mesh network-on-chip. IET Comput. Digit. Tech. 10 (5) (2016)
Aliasghar Makhlooghpour, Hamid Soleimani, Arash Ahmadi, Mark Zwolinski, Mehrdad Saif
High accuracy implementation of Adaptive Exponential integrated and fire neuron model. IJCNN (2016)
Shengyu Duan, Basel Halak, Rick Wong, Mark Zwolinski
NBTI Lifetime Evaluation and Extension in Instruction Caches. ERMAVSS@DATE (2016)
Illani Mohd Nawi, Basel Halak, Mark Zwolinski
Ageing Impact on a High Speed Voltage Comparator with Hysteresis. ERMAVSS@DATE (2016)
Illani Mohd Nawi, Basel Halak, Mark Zwolinski
The influence of hysteresis voltage on single event transients in a 65nm CMOS high speed comparator. ETS (2016)
Basel Halak, Mark Zwolinski, Mohd Syafiq Mispan
Overview of PUF-based hardware security solutions for the internet of things. MWSCAS (2016)
Mark Zwolinski, Wolfgang Kunz, Kjetil Svarstad, Andrew D. Brown
The European Masters in Embedded Computing Systems (EMECS). EWME (2016)
Rimpy Bishnoi, Vijay Laxmi, Manoj Singh Gaur, Mark Zwolinski
Resilient routing implementation in 2D mesh NoC. Microelectron. Reliab. 56 (2016)
Mohd Syafiq Mispan, Basel Halak, Mark Zwolinski
NBTI aging evaluation of PUF-based differential architectures. IOLTS (2016)
Haider Abbas, Mark Zwolinski, Basel Halak
Static Aging Analysis Using 3-Dimensional Delay Library. ERMAVSS@DATE (2016)
Anirban Sengupta, Saraju P. Mohanty, Fabrizio Lombardi, Mark Zwolinski
IEEE Access Special Section Editorial: Security and Reliability Aware System Design for Mobile Computing Devices. IEEE Access 4 (2016)
Radi Husin Bin Ramlee, Mark Zwolinski
Using Iddt current degradation to monitor ageing in CMOS circuits. PATMOS (2016)
Ibrahim A. Bello, Basel Halak, Mohammed El-Hajjar, Mark Zwolinski
A Survey of VLSI Implementations of Tree Search Algorithms for MIMO Detection. Circuits Syst. Signal Process. 35 (10) (2016)
Sara Vinco, Michele Lora, Mark Zwolinski
Conservative behavioural modelling in systemc-AMS. FDL (2015)
Mohamed Tagelsir Mohammadat, Noohul Basheer Zain Ali, Fawnizu Azmadi Hussin, Mark Zwolinski
Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs. IEEE Trans. Very Large Scale Integr. Syst. 23 (3) (2015)
Tarek Nechma, Mark Zwolinski
Parallel Sparse Matrix Solution for Circuit Simulation on FPGAs. IEEE Trans. Computers 64 (4) (2015)
Manoj Singh Gaur, Vijay Laxmi, Mark Zwolinski, Manoj Kumar, Niyati Gupta, Ashish Sharma
Network-on-chip: Current issues and challenges. VDAT (2015)
Ashish Sharma, Prachi Upadhyay, Ruby Ansar, Vijay Laxmi, Lava Bhargava, Manoj Singh Gaur, Mark Zwolinski
A framework for thermal aware reliability estimation in 2D NoC. VDAT (2015)
Niyati Gupta, Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Mark Zwolinski
σLBDR: Congestion-aware logic based distributed routing for 2D NoC. VDAT (2015)
Anton Kulakov, Mark Zwolinski, Jeffrey S. Reeve
Fault Tolerance in Distributed Neural Computing. CoRR (2015)
Ibrahim A. Bello, Basel Halak, Mohammed El-Hajjar, Mark Zwolinski
VLSI implementation of a scalable K-best MIMO detector. ISCIT (2015)
Rimpy Bishnoi, Vijay Laxmi, Manoj Singh Gaur, Radi Husin Bin Ramlee, Mark Zwolinski
CERI: Cost-Effective Routing Implementation Technique for Network-on-Chip. VLSI Design (2015)
Mohd Azman Abdul Latif, Noohul Basheer Zain Ali, Fawnizu Azmadi Hussin, Mark Zwolinski
Implications of Burn-In Stress on NBTI Degradation. CoRR (2015)
Massoud Mokhtarpour Ghahroodi, Mark Zwolinski
In-Field Logic Repair of Deep Sub-Micron CMOS Processors. CoRR (2015)
Mohamed Tagelsir Mohammadat, Noohul Basheer Zain Ali, Fawnizu Azmadi Hussin, Mark Zwolinski
Multivoltage Aware Resistive Open Fault Model. IEEE Trans. Very Large Scale Integr. Syst. 22 (2) (2014)
Yang Lin, Mark Zwolinski, Basel Halak
A low-cost radiation hardened flip-flop. DATE (2014)
Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Pankaj Kumar Srivastava, Seok-Bum Ko, Mark Zwolinski
A novel non-minimal/minimal turn model for highly adaptive routing in 2D NoCs. NOCS (2014)
Ji Qi, Mark Zwolinski
Efficient simulation and modelling of non-rectangular NoC topologies. DATE (2014)
Yang Lin, Mark Zwolinski
A cost-efficient self-checking register architecture for radiation hardened designs. ISCAS (2014)
Michael Merrett, Mark Zwolinski
Monte Carlo Static Timing Analysis with statistical sampling. Microelectron. Reliab. 54 (2) (2014)
Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Mark Zwolinski
A novel non-minimal turn model for highly adaptive routing in 2D NoCs. VLSI-SoC (2014)
Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Seok-Bum Ko, Mark Zwolinski
CARM: Congestion Adaptive Routing Method for On Chip Networks. VLSI Design (2014)
Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Seok-Bum Ko, Mark Zwolinski
Highly adaptive and congestion-aware routing for 3D NoCs. ACM Great Lakes Symposium on VLSI (2014)
Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Masoumeh Ebrahimi, Mark Zwolinski
Fault tolerant and highly adaptive routing for 2D NoCs. DFT (2014)
Rimpy Bishnoi, Vijay Laxmi, Manoj Singh Gaur, Radi Husin Bin Ramlee, Mark Zwolinski
Fault tolerant routing implementation mechanism for irregular 2D mesh NoCs. NORCHIP (2014)
Liang Li, Robert G. Maunder, Bashir M. Al-Hashimi, Mark Zwolinski, Lajos Hanzo
Energy-Conscious Turbo Decoder Design: A Joint Signal Processing and Transmit Energy Reduction Approach. IEEE Trans. Veh. Technol. 62 (8) (2013)
Kai Chi Alex Lam, Mark Zwolinski
Circuit Transient Analysis Using State Space Equations. VDAT (2013)
Cliff C. N. Sze, Laleh Behjat, Nikhil Jayakumar, Atul Walimbe, Gregory Ford, Mark Zwolinski, Harish Dangat, Giriraj Kakol
ISPD 2013 expert designer/user session (eds). ISPD (2013)
Miona Andrejevic Stosovic, Miljana Milic, Mark Zwolinski, Vanco B. Litovski
Oscillation-based analog diagnosis using artificial neural networks based inference mechanism. Comput. Electr. Eng. 39 (2) (2013)
Yang Lin, Mark Zwolinski
SETTOFF: A fault tolerant flip-flop for building Cost-efficient Reliable Systems. IOLTS (2012)
Hamid Soleimani, Arash Ahmadi, Mohammad Bavandpour, A. Ali Amirsoleimani, Mark Zwolinski
A Large Scale Digital Simulation of Spiking Neural Networks (SNN) on Fast SystemC Simulator. UKSim (2012)
Arash Ahmadi, Eduardo Mangieri, Koushik Maharatna, Srinandan Dasmahapatra, Mark Zwolinski
On the VLSI Implementation of Adaptive-Frequency Hopf Oscillator. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2011)
Arash Ahmadi, Mark Zwolinski
Fixed-point multiplication: A probabilistic bit-pattern view. Microelectron. Reliab. 51 (4) (2011)
Harsh Gidra, Israrul Haque, Nitin P. Kumar, M. Sargurunathan, Manoj Singh Gaur, Vijay Laxmi, Mark Zwolinski, Virendra Singh
Parallelizing TUNAMI-N1 Using GPGPU. HPCC (2011)
Manoj Singh Gaur, Vijay Laxmi, Lakshminarayanan V., Kamal Cahndra, Mark Zwolinski
Acceleration of packet filtering using gpgpu. SIN (2011)
Michael Merrett, Plamen Asenov, Yangang Wang, Mark Zwolinski, Dave Reid, Campbell Millar, Scott Roy, Zhenyu Liu, Stephen B. Furber, Asen Asenov
Modelling circuit performance variations due to statistical variability: Monte Carlo static timing analysis. DATE (2011)
P. Lalith Suresh, Navaneeth Rameshan, Manoj Singh Gaur, Mark Zwolinski, Vijay Laxmi
Acceleration of Functional Validation Using GPGPU. DELTA (2011)
Massoud Mokhtarpour Ghahroodi, Mark Zwolinski, Emre Özer
Radiation hardening by design: A novel gate level approach. AHS (2011)
Massoud Mokhtarpour Ghahroodi, Mark Zwolinski, Rick Wong, Shi-Jie Wen
Timing Vulnerability Factors of Ultra Deep-sub-micron CMOS. ETS (2011)
Michael Merrett, Yangang Wang, Mark Zwolinski, Koushik Maharatna, Massimo Alioto
Design metrics for RTL level estimation of delay variability due to intradie (random) variations. ISCAS (2010)
Andrew D. Brown, Steve B. Furber, Jeff S. Reeve, Peter R. Wilson, Mark Zwolinski, John E. Chad, Luis A. Plana, David R. Lester
A communication infrastructure for a million processor machine. Conf. Computing Frontiers (2010)
Aisha Fouad Bushager, Mark Zwolinski
Modelling Smart Card Security Protocols in SystemC TLM. EUC (2010)
Tarek Nechma, Mark Zwolinski, Jeff S. Reeve
Parallel sparse matrix solver for direct circuit simulations on FPGAs. ISCAS (2010)
Ahmed K. Al-Sulaifanie, Arash Ahmadi, Mark Zwolinski
Very large scale integration architecture for integer wavelet transform. IET Comput. Digit. Tech. 4 (6) (2010)
Miljana Sokolovic, Vanco B. Litovski, Mark Zwolinski
New concepts of worst-case delay and yield estimation in asynchronous VLSI circuits. Microelectron. Reliab. 49 (2) (2009)
Biswajit Mishra, Bashir M. Al-Hashimi, Mark Zwolinski
Variation resilient adaptive controller for subthreshold circuits. DATE (2009)
Yangang Wang, Mark Zwolinski
Analytical Transient Response and Propagation Delay Model for Nanoscale CMOS Inverter. ISCAS (2009)
Karthik Baddam, Mark Zwolinski
Path switching: a technique to tolerate dual rail routing imbalances. Des. Autom. Embed. Syst. 12 (3) (2008)
Karthik Baddam, Mark Zwolinski
Divided Backend Duplication Methodology for Balanced Dual Rail Routing. CHES (2008)
Arash Ahmadi, Mark Zwolinski
Symbolic noise analysis approach to computational hardware optimization. DAC (2008)
Arash Ahmadi, Mark Zwolinski
On the probability distribution of fixed-point multiplication. ICECS (2008)
Yangang Wang, Mark Zwolinski, Michael Merrett
Behavioural Modelling for Stability of CMOS SRAM Cells Subject to Random Discrete Doping. BMAS (2008)
Reza Asgary, Karim Mohammadi, Mark Zwolinski
Using neural networks as a fault detection mechanism in MEMS devices. Microelectron. Reliab. 47 (1) (2007)
Arash Ahmadi, Mark Zwolinski
Multiple-Width Bus Partitioning Approach to Datapath Synthesis. ISCAS (2007)
Noohul Basheer Zain Ali, Mark Zwolinski, Bashir M. Al-Hashimi
Testing of Level Shifters in Multiple Voltage Designs. ICECS (2007)
Xiaoxuan She, Mark Zwolinski
A novel self-routing reconfigurable fault-tolerant cell array. AHS (2007)
Driss Bouami, El Mostapha Aboulhamid, Mohsine Eleuldj, Mark Zwolinski
General and Technical Program Chairs' Message. ICECS (2007)
Karthik Baddam, Mark Zwolinski
Evaluation of Dynamic Voltage and Frequency Scaling as a Differential Power Analysis Countermeasure. VLSI Design (2007)
Petros Oikonomakos, Mark Zwolinski
An Integrated High-Level On-Line Test Synthesis Tool. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (11) (2006)
Noohul Basheer Zain Ali, Mark Zwolinski, Bashir M. Al-Hashimi, Peter Harrod
Dynamic Voltage Scaling Aware Delay Fault Testing. ETS (2006)

Mark Zwolinski.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Mark Zwolinski