Laleh Behjat

Publication Activity (10 Years)

Years Active: 1999-2024
Publications (10 Years): 29

Top Topics

Computer Engineering

Behavioral Model

Top Venues

ACM Trans. Design Autom. Electr. Syst.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Tiago Augusto Fontana, Erfan Aghaeekiasaraee, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, Laleh Behjat, José Luís Güntzel
ILPGRC: ILP-Based Global Routing Optimization With Cell Movements. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (1) (2024)
Upma Gandhi, Erfan Aghaeekiasaraee, Ismail S. K. Bustany, Payam Mousavi, Matthew E. Taylor, Laleh Behjat
RL-Ripper: : A Framework for Global Routing Using Reinforcement Learning and Smart Net Ripping Techniques. ACM Great Lakes Symposium on VLSI (2023)
Wilian Gatti Junior, Emily Marasco, Beaumie Kim, Laleh Behjat, Marjan Eggermont
How ChatGPT can inspire and improve serious board game design. Int. J. Serious Games 10 (4) (2023)
Erfan Aghaeekiasaraee, Aysa Fakheri Tabrizi, Tiago Augusto Fontana, Renan Netto, Sheiny Fabre Almeida, Upma Gandhi, José Luís Güntzel, David T. Westwick, Laleh Behjat
CRP2.0: A Fast and Robust Cooperation between Routing and Placement in Advanced Technology Nodes. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Robyn Mae Paul, Yani Jazayeri, Laleh Behjat, Michael Potter
Design of an Integrated Project-Based Learning Curriculum: Analysis Through Fink's Taxonomy of Significant Learning. IEEE Trans. Educ. 66 (5) (2023)
Robyn Paul, Robert Brennan, Laleh Behjat
Hidden curriculum: students' reflections and observations. FIE (2022)
Erfan Aghaeekiasaraee, Aysa Fakheri Tabrizi, Tiago Augusto Fontana, Renan Netto, Sheiny Fabre Almeida, Upma Gandh, José Luís Gützel, David T. Westwick, Laleh Behjat
CR&P: An Efficient Co-operation between Routing and Placement. DATE (2022)
Renan Netto, Sheiny Fabre, Tiago Augusto Fontana, Vinicius S. Livramento, Laércio Lima Pilla, Laleh Behjat, José Luís Güntzel
Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (5) (2022)
Sheiny Fabre Almeida, Aysa Fakheri Tabrizi, Erfan Aghaeekiasaraee, Renan Netto, Tiago Augusto Fontana, Upma Gandh, José Luís Güntzel, Laleh Behjat, Cristina Meinhardt
E-RVP: An Initial Design Rule Violation Predictor Using Placement Information. ICECS 2022 (2022)
Sheiny Fabre Almeida, José Luís Güntzel, Laleh Behjat, Cristina Meinhardt
Routability-Driven Detailed Placement Using Reinforcement Learning. VLSI-SoC (2022)
Niyousha Raeesinejad, Mohammad Moshirpour, Laleh Behjat, Yalda Afshar
Design Decisions Matter: Conveying the Importance of Software Engineering Best Practices through Hybrid PBL. FIE (2022)
Laleh Behjat
EDAML 2022 Invited Speaker 5: Combining Optimization and Machine Learning in Physical Design. IPDPS Workshops (2022)
Tiago Augusto Fontana, Erfan Aghaeekiasaraee, Renan Netto, Sheiny Fabre Almeida, Upma Gandh, Aysa Fakheri Tabrizi, David T. Westwick, Laleh Behjat, José Luís Güntzel
ILP-Based Global Routing Optimization with Cell Movements. ISVLSI (2021)
Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan Rakai, Ismail Bustany, Andrew A. Kennings, Laleh Behjat
Eh?Predictor: A Deep Learning Framework to Identify Detailed Routing Short Violations From a Placed Netlist. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (6) (2020)
Jucemar Monteiro, Marcelo O. Johann, Laleh Behjat
An Optimized Cost Flow Algorithm to Spread Cells in Detailed Placement. ACM Trans. Design Autom. Electr. Syst. 24 (3) (2019)
Aysa Fakheri Tabrizi, Nima Karimpour Darav, Shuchang Xu, Logan Rakai, Ismail Bustany, Andrew A. Kennings, Laleh Behjat
A machine learning framework to identify detailed routing short violations from a placed netlist. DAC (2018)
Nima Karimpour Darav, Ismail S. Bustany, Andrew A. Kennings, David T. Westwick, Laleh Behjat
Eh?Legalizer: A High Performance Standard-Cell Legalizer Observing Technology Constraints. ACM Trans. Design Autom. Electr. Syst. 23 (4) (2018)
Nima Karimpour Darav, Ismail S. Bustany, Andrew A. Kennings, Laleh Behjat
A Fast, Robust Network Flow-based Standard-Cell Legalization Method for Minimizing Maximum Movement. ISPD (2017)
Ali Farshidi, Logan Rakai, Laleh Behjat
An efficient optimal clock network buffer sizing with slew consideration. CCECE (2017)
Jinwook Jung, Pei-Yu Lee, Yan-Shiun Wu, Nima Karimpour Darav, Iris Hui-Ru Jiang, Victor N. Kravets, Laleh Behjat, Yih-Lang Li, Gi-Joon Nam
DATC RDF: Robust design flow database: Invited paper. ICCAD (2017)
Amin Farshidi, Laleh Behjat, Logan M. Rakai, David T. Westwick
A Multiobjective Cooptimization of Buffer and Wire Sizes in High-Performance Clock Trees. IEEE Trans. Circuits Syst. II Express Briefs (4) (2017)
Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan Rakai, Andrew A. Kennings, Laleh Behjat
Detailed routing violation prediction during placement using machine learning. VLSI-DAT (2017)
Emily Marasco, Stephanie Hladik, Laleh Behjat, William D. Rosehart
Exploring Electrical Engineering through movement: Going with the Flow and Programming Puzzles. FIE (2016)
Emily Marasco, Laleh Behjat, Marjan Eggermont, William D. Rosehart, Mohammad Moshirpour, Ronald Hugo
Using gamification for engagement and learning in electrical and computer engineering classrooms. FIE (2016)
Jinwook Jung, Iris Hui-Ru Jiang, Gi-Joon Nam, Victor N. Kravets, Laleh Behjat, Yih-Lang Li
OpenDesign flow database: the infrastructure for VLSI design and design automation research. ICCAD (2016)
Nima Karimpour Darav, Andrew A. Kennings, Aysa Fakheri Tabrizi, David T. Westwick, Laleh Behjat
Eh?Placer: A High-Performance Modern Technology-Driven Placer. ACM Trans. Design Autom. Electr. Syst. 21 (3) (2016)
Abubakr Hassan Abdelhafiz, Laleh Behjat, Fadhel M. Ghannouchi, Mohamed Helaoui, Oualid Hammi
A High-Performance Complexity Reduced Behavioral Model and Digital Predistorter for MIMO Systems With Crosstalk. IEEE Trans. Commun. 64 (5) (2016)
Jucemar Monteiro, Nima Karimpour Darav, Guilherme Flach, Mateus Fogaça, Ricardo Augusto da Luz Reis, Andrew A. Kennings, Marcelo O. Johann, Laleh Behjat
Routing-Aware Incremental Timing-Driven Placement. ISVLSI (2016)
Aysa Fakheri Tabrizi, Laleh Behjat, William Swartz, Logan M. Rakai
A fast force-directed simulated annealing for 3D IC partitioning. Integr. 55 (2016)
Nima Karimpour Darav, Andrew A. Kennings, David T. Westwick, Laleh Behjat
High Performance Global Placement and Legalization Accounting for Fence Regions. ICCAD (2015)
Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan M. Rakai, Andrew A. Kennings, William Swartz, Laleh Behjat
A Detailed Routing-Aware Detailed Placement Technique. ISVLSI (2015)
Nima Karimpour Darav, Amin Farshidi, Aysa Fakheri Tabrizi, Emily Marasco, Amir Karbalaei, Andrew A. Kennings, Ismail S. Bustany, Laleh Behjat
The impact of industry-organized contests on EDA education. MSE (2015)
Emily Marasco, Laleh Behjat, William D. Rosehart
Enhancing EDA education through gamification. MSE (2015)
Amin Farshidi, Logan M. Rakai, Laleh Behjat, David T. Westwick
Optimal gate sizing using a self-tuning multi-objective framework. Integr. 47 (3) (2014)
Logan M. Rakai, Amin Farshidi, David T. Westwick, Laleh Behjat
Variation-Aware Geometric Programming Models for the Clock Network Buffer Sizing Problem. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (4) (2014)
Andrew A. Kennings, Nima Karimpour Darav, Laleh Behjat
Detailed placement accounting for technology constraints. VLSI-SoC (2014)
Emily Marasco, Laleh Behjat
Integrating creativity into elementary electrical engineering education using CDIO and project-based learning. MSE (2013)
Amin Farshidi, Logan M. Rakai, Bardia Samimi, Laleh Behjat, David T. Westwick
A new a priori net length estimation technique for integrated circuits using radial basis functions. Comput. Electr. Eng. 39 (4) (2013)
Delaram Shahhosseini, M. Hossein Taghavi, Laleh Behjat, Leonid Belostotski
An analog-design assistant tool and an example of its application. MWSCAS (2013)
Logan M. Rakai, Amin Farshidi, Laleh Behjat, David T. Westwick
Buffer sizing for clock networks using robust geometric programming considering variations in buffer sizes. ISPD (2013)
Cliff C. N. Sze, Laleh Behjat, Nikhil Jayakumar, Atul Walimbe, Gregory Ford, Mark Zwolinski, Harish Dangat, Giriraj Kakol
ISPD 2013 expert designer/user session (eds). ISPD (2013)
Amin Farshidi, Logan M. Rakai, Laleh Behjat, David T. Westwick
A self-tuning multi-objective optimization framework for geometric programming with gate sizing applications. ACM Great Lakes Symposium on VLSI (2013)
Logan M. Rakai, Laleh Behjat
Parallel clock tree synthesis. CCECE (2012)
Logan M. Rakai, Laleh Behjat, Sebastian Martin, Jose Aguado
An algebraic multigrid-based algorithm for circuit clustering. Appl. Math. Comput. 218 (9) (2012)
Logan M. Rakai, Amin Farshidi, Laleh Behjat, David T. Westwick
A New Length-Based Algebraic Multigrid Clustering Algorithm. VLSI Design 2012 (2012)
William Swartz, Yang-Yang Li, Amin Farshidi, Laleh Behjat
Analysis of post-placement length estimation. SLIP (2012)
Yang-Yang Li, Logan M. Rakai, Laleh Behjat, Bill Swartz
Wirelength and congestion estimation for routability-driven placement. SLIP (2011)
Amin Farshidi, Laleh Behjat, Logan M. Rakai, Bahareh Fathi
A pre-placement individual net length estimation model and an application for modern circuits. Integr. 44 (2) (2011)
Bahareh Fathi, Laleh Behjat, Logan M. Rakai
A pre-placement net length estimation technique for mixed-size circuits. SLIP (2009)
Logan M. Rakai, Laleh Behjat, Shawki Areibi, Tamás Terlaky
A Multilevel Congestion-Based Global Router. VLSI Design 2009 (2009)
Laleh Behjat, Jianhua Li, Logan M. Rakai, Jie Huang
Two Clustering Preprocessing Techniques for Large-Scale Circuits. ISCAS (2007)
Kristofer Vorwerk, Andrew A. Kennings, Doris T. Chen, Laleh Behjat
Floorplan repair using dynamic whitespace management. ACM Great Lakes Symposium on VLSI (2007)
Jianhua Li, Laleh Behjat, Jie Huang
An effective clustering algorithm for mixed-size placement. ISPD (2007)
Jianhua Li, Laleh Behjat, Logan Rakai
Clustering algorithms for circuit partitioning and placement problems. ECCTD (2007)
Jianhua Li, Laleh Behjat, Andrew A. Kennings
Net Cluster: A Net-Reduction-Based Clustering Preprocessing Algorithm for Partitioning and Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (4) (2007)
Logan M. Rakai, Jianhua Li, Laleh Behjat, Jie Huang
A Structural Study and Hyperedge Clustering Technique for Large Scale Circuits. SiPS (2006)
Laleh Behjat, Anthony Vannelli, William D. Rosehart
Integer Linear Programming Models for Global Routing. INFORMS J. Comput. 18 (2) (2006)
Jianhua Li, Laleh Behjat
A connectivity based clustering algorithm with application to VLSI circuit partitioning. IEEE Trans. Circuits Syst. II Express Briefs (5) (2006)
William D. Rosehart, Codruta Roman, Laleh Behjat
Interior point models for power system stability problems. Eur. J. Oper. Res. 171 (3) (2006)
Jianhua Li, Laleh Behjat
Net cluster: a net-reduction based clustering preprocessing algorithm. ISPD (2006)
Jianhua Li, Laleh Behjat, Blair Schiffner
A Structure Based Clustering Algorithm with Applications to VLSI Physical Design. IWSOC (2005)
William D. Rosehart, Antony Schellenberg, Laleh Behjat, Pouyan Jazayeri, José A. Aguado
Coordinated static stability margin management of inter-regional electricity systems. ISCAS (5) (2005)
Laleh Behjat, Andy Chiang
Fast integer linear programming based models for VLSI global routing. ISCAS (6) (2005)
Blair Schiffner, Jianhua Li, Laleh Behjat
A Multivalue Eigenvalue Based Circuit Partitioning Technique. IWSOC (2005)
Laleh Behjat, Anthony Vannelli
Steiner Tree Construction Based on Congestion for the Global Routing Problem. IWSOC (2003)
Laleh Behjat, Dorothy Kucar, Anthony Vannelli
A Novel Eigenvector Technique for Large Scale Combinatorial Problems in VLSI Layout. J. Comb. Optim. 6 (3) (2002)
Laleh Behjat, Anthony Vannelli
VLSI concentric partitioning using interior point quadratic programming. ISCAS (6) (1999)