Logan M. Rakai

Publication Activity (10 Years)

Years Active: 2006-2017
Publications (10 Years): 2

Top Topics

Multiobjective Genetic Algorithm

Tree Construction

Radial Basis Function

Simulated Annealing

Top Venues

Comput. Electr. Eng.

Publications

Amin Farshidi, Laleh Behjat, Logan M. Rakai, David T. Westwick
A Multiobjective Cooptimization of Buffer and Wire Sizes in High-Performance Clock Trees. IEEE Trans. Circuits Syst. II Express Briefs (4) (2017)
Aysa Fakheri Tabrizi, Laleh Behjat, William Swartz, Logan M. Rakai
A fast force-directed simulated annealing for 3D IC partitioning. Integr. 55 (2016)
Aysa Fakheri Tabrizi, Nima Karimpour Darav, Logan M. Rakai, Andrew A. Kennings, William Swartz, Laleh Behjat
A Detailed Routing-Aware Detailed Placement Technique. ISVLSI (2015)
Amin Farshidi, Logan M. Rakai, Laleh Behjat, David T. Westwick
Optimal gate sizing using a self-tuning multi-objective framework. Integr. 47 (3) (2014)
Logan M. Rakai, William D. Rosehart
GPU-Accelerated Solutions to Optimal Power Flow Problems. HICSS (2014)
Logan M. Rakai, Amin Farshidi, David T. Westwick, Laleh Behjat
Variation-Aware Geometric Programming Models for the Clock Network Buffer Sizing Problem. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (4) (2014)
Amin Farshidi, Logan M. Rakai, Bardia Samimi, Laleh Behjat, David T. Westwick
A new a priori net length estimation technique for integrated circuits using radial basis functions. Comput. Electr. Eng. 39 (4) (2013)
Logan M. Rakai, Amin Farshidi, Laleh Behjat, David T. Westwick
Buffer sizing for clock networks using robust geometric programming considering variations in buffer sizes. ISPD (2013)
Amin Farshidi, Logan M. Rakai, Laleh Behjat, David T. Westwick
A self-tuning multi-objective optimization framework for geometric programming with gate sizing applications. ACM Great Lakes Symposium on VLSI (2013)
Logan M. Rakai, Laleh Behjat
Parallel clock tree synthesis. CCECE (2012)
Logan M. Rakai, Laleh Behjat, Sebastian Martin, Jose Aguado
An algebraic multigrid-based algorithm for circuit clustering. Appl. Math. Comput. 218 (9) (2012)
Logan M. Rakai, Amin Farshidi, Laleh Behjat, David T. Westwick
A New Length-Based Algebraic Multigrid Clustering Algorithm. VLSI Design 2012 (2012)
Yang-Yang Li, Logan M. Rakai, Laleh Behjat, Bill Swartz
Wirelength and congestion estimation for routability-driven placement. SLIP (2011)
Amin Farshidi, Laleh Behjat, Logan M. Rakai, Bahareh Fathi
A pre-placement individual net length estimation model and an application for modern circuits. Integr. 44 (2) (2011)
Bahareh Fathi, Laleh Behjat, Logan M. Rakai
A pre-placement net length estimation technique for mixed-size circuits. SLIP (2009)
Logan M. Rakai, Laleh Behjat, Shawki Areibi, Tamás Terlaky
A Multilevel Congestion-Based Global Router. VLSI Design 2009 (2009)
Laleh Behjat, Jianhua Li, Logan M. Rakai, Jie Huang
Two Clustering Preprocessing Techniques for Large-Scale Circuits. ISCAS (2007)
Logan M. Rakai, Jianhua Li, Laleh Behjat, Jie Huang
A Structural Study and Hyperedge Clustering Technique for Large Scale Circuits. SiPS (2006)