Volkan Kursun

ORCID

Publication Activity (10 Years)

Years Active: 2002-2022
Publications (10 Years): 15

Top Venues

ISCAS

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Very Large Scale Integr. Syst.

Microelectron. J.

Publications

Anil Kumar Gundu, Volkan Kursun
Impact of Sheet Width and Silicon Height in 3D Stacked Nanosheet GAA Transistor Technology. ISCAS (2022)
Anil Kumar Gundu, Volkan Kursun
Optimization of 3D Stacked Nanosheets in 5nm Gate-all-around Transistor Technology. SoCC (2021)
Anil Kumar Gundu, Volkan Kursun
Novel low leakage and energy efficient dual-pullup/dual-pulldown repeater. Integr. 78 (2021)
Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2020)
Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
Statistical Modeling and Design of a 16nm 9T SRAM Cell Considering Post-Synthesis Removal of Metallic Carbon-Nanotubes. ICEIC (2019)
Jiachen Jiang, Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun
Carbon-Based Three-Dimensional SRAM Cell with Minimum Inter-Layer Area Skew Considering Process imperfections. ASICON (2019)
Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark M. Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory. IEEE Trans. Very Large Scale Integr. Syst. 27 (2) (2019)
Anil Kumar Gundu, Volkan Kursun
Low Leakage Clock Tree With Dual-Threshold- Voltage Split Input-Output Repeaters. IEEE Trans. Very Large Scale Integr. Syst. 27 (7) (2019)
Anil Kumar Gundu, Volkan Kursun
Energy Efficient Clock Distribution with Low-Leakage Multi-Vt Buffers. PATMOS (2019)
Yanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun
Metallic-carbon-nanotube-removal tolerant SRAM cell with 9 transistors. ASICON (2017)
Yanan Sun, Weifeng He, Zhigang Mao, Volkan Kursun
Variable strength keeper for high-speed and low-leakage carbon nanotube domino logic. Microelectron. J. 62 (2017)
Hailong Jiao, Yongmin Qiu, Volkan Kursun
Low power and robust memory circuits with asymmetrical ground gating. Microelectron. J. 48 (2016)
Shairfe Muhammad Salahuddin, Volkan Kursun
Write Assist SRAM Cell with Asymmetrical Bitline Access Transistors for Enhanced Data Stability and Write Ability. J. Circuits Syst. Comput. 25 (1) (2016)
Hailong Jiao, Yongmin Qiu, Volkan Kursun
Variability-aware 7T SRAM circuit with low leakage high data stability SLEEP mode. Integr. 53 (2016)
Hailong Jiao, Yongmin Qiu, Volkan Kursun
Variations-tolerant 9T SRAM circuit with robust and low leakage SLEEP mode. IOLTS (2016)
Yanan Sun, Hailong Jiao, Volkan Kursun
A Novel Robust and Low-Leakage SRAM Cell With Nine Carbon Nanotube Transistors. IEEE Trans. Very Large Scale Integr. Syst. 23 (9) (2015)
Yanan Sun, Volkan Kursun
Carbon-based sleep switch dynamic logic circuits with variable strength keeper for lower-leakage currents and higher-speed. ISCAS (2015)
Hong Zhu, Volkan Kursun
2-Phase high-frequency clock distribution with SPLIT-IO dual-Vt repeaters for suppressed leakage currents. ISCAS (2015)
Hong Zhu, Volkan Kursun
Triple-threshold-voltage 9-transistor SRAM cell for data stability and energy-efficiency at ultra-low power supply voltages. ICM (2014)
Shairfe Muhammad Salahuddin, Volkan Kursun
High-speed and low-leakage FinFET SRAM cell with enhanced read and write voltage margins. ISIC (2014)
Hong Zhu, Volkan Kursun
A Comprehensive Comparison of Data Stability Enhancement Techniques With Novel Nanoscale SRAM Cells Under Parameter Fluctuations. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2014)
Hong Zhu, Volkan Kursun
A comprehensive comparison of superior triple-threshold-voltage 7-transistor, 8-transistor, and 9-transistor SRAM cells. ISCAS (2014)
Yanan Sun, Volkan Kursun
Carbon Nanotubes Blowing New Life Into NP Dynamic CMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2014)
Hong Zhu, Volkan Kursun
Novel Low-Leakage and High-Speed Triple-Threshold-Voltage Buffers With Skewed Inputs and Outputs. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2014)
Hailong Jiao, Volkan Kursun
Mode transition timing and energy overhead analysis in noise-aware MTCMOS circuits. Microelectron. J. 45 (8) (2014)
Yanan Sun, Hailong Jiao, Volkan Kursun
Low-leakage 9-CN-MOSFET SRAM cell with enhanced read and write voltage margins. ICM (2014)
Hong Zhu, Volkan Kursun
Novel dual-threshold-voltage energy-efficient buffers for driving large extrinsic load capacitance. ISCAS (2013)
Yanan Sun, Volkan Kursun
Low-power and compact NP dynamic CMOS adder with 16nm carbon nanotube transistors. ISCAS (2013)
Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun
Low-leakage hybrid FinFET SRAM cell with asymmetrical gate overlap / underlap bitline access transistors for enhanced read data stability. ISCAS (2013)
Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun
A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability. ISQED (2013)
Hailong Jiao, Volkan Kursun
Reactivation Noise Suppression With Sleep Signal Slew Rate Modulation in MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 21 (3) (2013)
Hong Zhu, Volkan Kursun
Impact of process parameter and supply voltage fluctuations on multi-threshold-voltage seven-transistor static memory cells. ISQED (2013)
Khawar Sarfraz, Volkan Kursun
Characterization of a low leakage current and high-speed 7T SRAM circuit with wide voltage margins. ISVLSI (2013)
Shairfe Muhammad Salahuddin, Volkan Kursun
Underlap engineered eight-transistor SRAM cell for stronger data stability enhanced write ability and suppressed leakage power consumption. ICECS (2013)
Hailong Jiao, Volkan Kursun
Characterization of mode transition timing overhead for net energy savings in low-noise MTCMOS circuits. VLSI-SoC (2013)
Hailong Jiao, Volkan Kursun
Ground gated 8T SRAM cells with enhanced read and hold data stability. ISVLSI (2013)
Yanan Sun, Volkan Kursun
NP dynamic CMOS resurrection with carbon nanotube field effect transistors. ISOCC (2012)
Hailong Jiao, Volkan Kursun
Threshold Voltage Tuning for Faster Activation With Lower Noise in Tri-Mode MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 20 (4) (2012)
Hailong Jiao, Volkan Kursun
Multi-phase sleep signal modulation for mode transition noise mitigation in MTCMOS circuits. ISOCC (2012)
Hailong Jiao, Volkan Kursun
Full-custom design of low leakage data preserving ground gated 6T SRAM cells to facilitate single-ended write operations. ISCAS (2012)
Hailong Jiao, Volkan Kursun
Sleep signal slew rate modulation for mode transition noise suppression in ground gated integrated circuits. SoCC (2011)
Sherif A. Tawfik, Volkan Kursun
Multi-Threshold Voltage FinFET Sequential Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19 (1) (2011)
Hong Zhu, Volkan Kursun
Symmetrical triple-threshold-voltage nine-transistor SRAM circuit with superior noise immunity and overall electrical quality. ISOCC (2011)
Yanan Sun, Volkan Kursun
Uniform carbon nanotube diameter and nanoarray pitch for VLSI of 16nm P-channel MOSFETs. VLSI-SoC (2011)
Hailong Jiao, Volkan Kursun
Noise-Aware Data Preserving Sequential MTCMOS Circuits with Dynamic Forward Body Bias. J. Circuits Syst. Comput. 20 (1) (2011)
Hailong Jiao, Volkan Kursun
Ground Bouncing Noise Suppression Techniques for Data Preserving Sequential MTCMOS Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19 (5) (2011)
Yanan Sun, Volkan Kursun
Leakage current and bottom gate voltage considerations in developing maximum performance 16nm N-channel carbon nanotube transistors. ISCAS (2011)
Hailong Jiao, Volkan Kursun
Ground-Bouncing-Noise-Aware Combinational MTCMOS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2010)
Hailong Jiao, Volkan Kursun
Tri-mode Operation for Noise Reduction and Data Preservation in Low-Leakage Multi-Threshold CMOS Circuits. VLSI-SoC (Selected Papers) (2010)
Hailong Jiao, Volkan Kursun
Smooth awakenings: Reactivation noise suppressed low-leakage and robust MTCMOS flip-flops. ISCAS (2010)
Sherif A. Tawfik, Volkan Kursun
Dual Supply Voltages and Dual Clock Frequencies for Lower Clock Power and Suppressed Temperature-Gradient-Induced Clock Skew. IEEE Trans. Very Large Scale Integr. Syst. 18 (3) (2010)
Hailong Jiao, Volkan Kursun
Reactivation noise suppression with threshold voltage tuning in sequential MTCMOS circuits. VLSI-SoC (2010)
Hailong Jiao, Volkan Kursun
Low-Leakage and Compact Registers with Easy-Sleep Mode. J. Low Power Electron. 6 (2) (2010)
Sherif A. Tawfik, Volkan Kursun
Robust FinFET Memory Circuits with P-Type Data Access Transistors for Higher Integration Density and Reduced Leakage Power. J. Low Power Electron. 5 (4) (2009)
Sherif A. Tawfik, Volkan Kursun
FinFET domino logic with independent gate keepers. Microelectron. J. 40 (11) (2009)
Sherif A. Tawfik, Volkan Kursun
Low Power and High Speed Multi Threshold Voltage Interface Circuits. IEEE Trans. Very Large Scale Integr. Syst. 17 (5) (2009)
Ranjith Kumar, Volkan Kursun
Temperature-adaptive voltage scaling for enhanced energy efficiency in subthreshold memory arrays. Microelectron. J. 40 (6) (2009)
Sherif A. Tawfik, Volkan Kursun
Multi-Vth FinFET sequential circuits with independent-gate bias and work-function engineering for reduced power consumption. APCCAS (2008)
Ranjith Kumar, Volkan Kursun
Temperature-adaptive voltage tuning for enhanced energy efficiency in ultra-low-voltage circuits. Microelectron. J. 39 (12) (2008)
Sherif A. Tawfik, Volkan Kursun
Characterization of New Static Independent-Gate-Biased FinFET Latches and Flip-Flops under Process Variations. ISQED (2008)
Ranjith Kumar, Volkan Kursun
Temperature-Adaptive Energy Reduction Techniques for Nano-CMOS Circuits Displaying Reversed temperature Dependence. J. Circuits Syst. Comput. 17 (3) (2008)
Ranjith Kumar, Zhiyu Liu, Volkan Kursun
Technique for Accurate Power and Energy Measurement with the Computer-Aided Design Tools. J. Circuits Syst. Comput. 17 (3) (2008)
Sherif A. Tawfik, Volkan Kursun
Compact FinFET Memory Circuits with P-Type Data Access Transistors for Low Leakage and Robust Operation. ISQED (2008)
Zhiyu Liu, Volkan Kursun
Characterization of a Novel Nine-Transistor SRAM Cell. IEEE Trans. Very Large Scale Integr. Syst. 16 (4) (2008)
Sherif A. Tawfik, Volkan Kursun
Low power and robust 7T dual-Vt SRAM circuit. ISCAS (2008)
Sherif A. Tawfik, Volkan Kursun
Asymmetric dual-gate multi-fin keeper bias options and optimization for low power and robust FinFET domino logic. APCCAS (2008)
Sherif A. Tawfik, Volkan Kursun
Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits. ISCAS (2008)
Sherif A. Tawfik, Volkan Kursun
Dynamic wordline voltage swing for low leakage and stable static memory banks. ISCAS (2008)
Sherif A. Tawfik, Volkan Kursun
Clock Distribution Networks with Gradual Signal Transition Time Relaxation for Reduced Power Consumption. J. Circuits Syst. Comput. 17 (6) (2008)
Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun
Statistical Data Stability and Leakage Evaluation of FinFET SRAM Cells with Dynamic Threshold Voltage Tuning under Process Parameter Fluctuations. ISQED (2008)
Zhiyu Liu, Volkan Kursun
New MTCMOS Flip-Flops with Simple Control Circuitry and Low Leakage Data Retention Capability. ICECS (2007)
Ranjith Kumar, Volkan Kursun
Voltage optimization for simultaneous energy efficiency and temperature variation resilience in CMOS circuits. Microelectron. J. 38 (4-5) (2007)
Sherif A. Tawfik, Volkan Kursun
Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew. ISCAS (2007)
Zhiyu Liu, Volkan Kursun
Charge Recycling MTCMOS for Low Energy Active/Sleep Mode Transitions. ISCAS (2007)
Zhiyu Liu, Volkan Kursun
PMOS-Only Sleep Switch Dual-Threshold Voltage Domino Logic in Sub-65-nm CMOS Technologies. IEEE Trans. Very Large Scale Integr. Syst. 15 (12) (2007)
Zhiyu Liu, Volkan Kursun
Charge Recycling Between Virtual Power and Ground Lines for Low Energy MTCMOS. ISQED (2007)
Ranjith Kumar, Volkan Kursun
Temperature-Adaptive Energy Reduction for Ultra-Low Power-Supply-Voltage Subthreshold Logic Circuits. ICECS (2007)
Sherif A. Tawfik, Volkan Kursun
Dual-V_DD Clock Distribution for Low Power and Minimum Temperature Fluctuations Induced Skew. ISQED (2007)
Volkan Kursun, Sherif A. Tawfik, Zhiyu Liu
Leakage-Aware Design of Nanometer SoC. ISCAS (2007)
Sherif A. Tawfik, Volkan Kursun
Low-power high-performance FinFET sequential circuits. SoCC (2007)
Sherif A. Tawfik, Volkan Kursun
Low Power and Stable FinFET SRAM with Static Independent Gate Bias for Enhanced Integration Density. ICECS (2007)
Sherif A. Tawfik, Volkan Kursun
Buffer Insertion and Sizing in Clock Distribution Networks with Gradual Transition Time Relaxation for Reduced Power Consumption. ICECS (2007)
Zhiyu Liu, Volkan Kursun
High Read Stability and Low Leakage Cache Memory Cell. ISCAS (2007)
Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun
An independent-gate FinFET SRAM cell for high data stability and enhanced integration density. SoCC (2007)
Sherif A. Tawfik, Volkan Kursun
Multi-Vth Level Conversion Circuits for Multi-VDD Systems. ISCAS (2007)
Sherif A. Tawfik, Volkan Kursun
Dual signal frequencies and voltage levels for low power and temperature-gradient tolerant clock distribution. ISLPED (2007)
Zhiyu Liu, Volkan Kursun
Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages. ISQED (2006)
Ranjith Kumar, Volkan Kursun
Reversed Temperature-Dependent Propagation Delay Characteristics in Nanometer CMOS Circuits. IEEE Trans. Circuits Syst. II Express Briefs (10) (2006)
Zhiyu Liu, Volkan Kursun
Leakage Biased Sleep Switch Domino Logic. ISQED (2006)
Zhiyu Liu, Volkan Kursun
High Read Stability and Low Leakage SRAM Cell Based on Data/Bitline Decoupling. SoCC (2006)
Zhiyu Liu, Volkan Kursun
Sleep switch dual threshold voltage domino logic with reduced subthreshold and gate oxide leakage current. Microelectron. J. 37 (8) (2006)
Ranjith Kumar, Volkan Kursun
A design methodology for temperature variation insensitive low power circuits. ACM Great Lakes Symposium on VLSI (2006)
Volkan Kursun, Zhiyu Liu
Wide temperature spectrum low leakage dynamic circuit technique for sub-65nm CMOS technologies. ISCAS (2006)
Ranjith Kumar, Volkan Kursun
Impact of temperature fluctuations on circuit characteristics in 180nm and 65nm CMOS technologies. ISCAS (2006)
Zhiyu Liu, Volkan Kursun
Leakage Biased pMOS Sleep Switch Dynamic Circuits. IEEE Trans. Circuits Syst. II Express Briefs (10) (2006)
Zhiyu Liu, Volkan Kursun
Leakage current starved domino logic. ACM Great Lakes Symposium on VLSI (2006)
Zhiyu Liu, Volkan Kursun
High Speed Low Swing Dynamic Circuits with Multiple Supply and Threshold Voltages. ISVLSI (2006)
Zhiyu Liu, Volkan Kursun
Leakage Power Characteristics of Dynamic Circuits in Nanometer CMOS Technologies. IEEE Trans. Circuits Syst. II Express Briefs (8) (2006)
Ranjith Kumar, Volkan Kursun
Supply and Threshold Voltage Optimization for Temperature Variation Insensitive Circuit Performance: A Comparison. SoCC (2006)
Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva G. Narendra
Cascode buffer for monolithic voltage conversion operating at high input supply voltages. ISCAS (1) (2005)

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Publication Activity (10 Years)

Top Topics

Top Venues

Volkan Kursun