Gerhard Schrom

Publication Activity (10 Years)

Years Active: 1995-2019
Publications (10 Years): 3

Top Topics

Parallel Processors

Fully Integrated

Top Venues

Publications

Gerhard Schrom, Sarath Makala, Ravi Sankar Vunnam, Raghuraman Narayanan, Fabrice Paillet
A Low-Latency 16-Phase Pulse Width Modulator with Phase Angle Control for 140MHz Fully Integrated Voltage Regulators on 22nm Tri-Gate CMOS. MWSCAS (2019)
Gerhard Schrom, Michael J. Hill, Sarath Makala, Ravi Sankar Vunnam, Arun Krishnamoorthy, Ryan Ferguson
Generation Intel® Core™ Microprocessors. ITC (2019)
Ankireddy Nalamalpu, Nasser A. Kurd, Anant Deval, Christopher Mozak, Jonathan Douglas, Ashish Khanna, Fabrice Paillet, Gerhard Schrom, Boyd Phelps
Broadwell: A family of IA 14nm processors. VLSIC (2015)
Donald S. Gardner, Gerhard Schrom, Fabrice Paillet, Tanay Karnik, Shekhar Borkar
Integrated inductors with magnetic materials for on-chip power conversion. Hot Chips Symposium (2011)
Jason Howard, Saurabh Dighe, Yatin Hoskote, Sriram R. Vangal, David Finan, Gregory Ruhl, David Jenkins, Howard Wilson, Nitin Borkar, Gerhard Schrom, Fabric Pailet, Shailendra Jain, Tiju Jacob, Satish Yada, Sraven Marella, Praveen Salihundam, Vasantha Erraguntla, Michael Konow, Michael Riepen, Guido Droege, Joerg Lindemann, Matthias Gries, Thomas Apel, Kersten Henriss, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek De, Rob F. Van der Wijngaart, Timothy G. Mattson
A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS. ISSCC (2010)
Jianping Xu, Peter Hazucha, Zuoguo Wu, Paolo A. Aseron, Mingwei Huang, Fabrice Paillet, Gerhard Schrom, James W. Tschanz, Vivek De, Tanay Karnik, Greg Taylor
A Band-Limited Active Damping Circuit With 13 dB Power Supply Resonance Reduction. IEEE J. Solid State Circuits 43 (1) (2008)
Jianping Xu, Peter Hazucha, Mingwei Huang, Paolo A. Aseron, Fabrice Paillet, Gerhard Schrom, James W. Tschanz, Cangsang Zhao, Vivek De, Tanay Karnik, Greg Taylor
On-Die Supply-Resonance Suppression Using Band-Limited Active Damping. ISSCC (2007)
Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik
High Voltage Tolerant Linear Regulator With Fast Digital Control for Biasing of Integrated DC-DC Converters. IEEE J. Solid State Circuits 42 (1) (2007)
Peter Hazucha, Fabrice Paillet, Sung Tae Moon, David J. Rennie, Gerhard Schrom, Donald S. Gardner, Kenneth Ikeda, Gell Gellman, Tanay Karnik
Low Voltage Buffered Bandgap Reference. ISQED (2007)
Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik
A Linear Regulator with Fast Digital Control for Biasing Integrated DC-DC Converters. ISSCC (2006)
Tanay Karnik, Peter Hazucha, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner
High-frequency DC-DC conversion : fact or fiction. ISCAS (2006)
Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva G. Narendra
Cascode buffer for monolithic voltage conversion operating at high input supply voltages. ISCAS (1) (2005)
Peter Hazucha, Gerhard Schrom, Jaehong Hahn, Bradley A. Bloechel, Paul Hack, Gregory E. Dermer, Siva G. Narendra, Donald Gardner, Tanay Karnik, Vivek De, Shekhar Borkar
A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package. IEEE J. Solid State Circuits 40 (4) (2005)
Ali Keshavarzi, Gerhard Schrom, Stephen Tang, Sean Ma, Keith A. Bowman, Sunit Tyagi, Kevin Zhang, Tom Linton, Nagib Hakim, Steven G. Duvall, John Brews, Vivek De
Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage. ISLPED (2005)
Arman Vassighi, Ali Keshavarzi, Siva G. Narendra, Gerhard Schrom, Yibin Ye, Seri Lee, Greg Chrysler, Manoj Sachdev, Vivek De
Design optimizations for microprocessors at low temperature. DAC (2004)
Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva G. Narendra, Tanay Karnik, Vivek De
Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. ISLPED (2004)
Stefan Halama, Christoph Pichler, Gerhard Rieger, Gerhard Schrom, Thomas Simlinger, Siegfried Selberherr
VISTA-user interface, task level, and tool integration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (10) (1995)