Nagib Hakim

Publication Activity (10 Years)

Years Active: 2004-2023
Publications (10 Years): 12

Top Topics

Gallium Arsenide

Incomplete Knowledge

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Xin Su, Phillip Howard, Nagib Hakim, Steven Bethard
Fusing Temporal Graphs into Transformers for Time-Sensitive Question Answering. CoRR (2023)
Gadi Singer, Joscha Bach, Tetiana Grinberg, Nagib Hakim, Phillip Howard, Vasudev Lal, Zev Rivlin
Thrill-K Architecture: Towards a Solution to the Problem of Knowledge Based Understanding. CoRR (2023)
Xin Su, Phillip Howard, Nagib Hakim, Steven Bethard
Fusing Temporal Graphs into Transformers for Time-Sensitive Question Answering. EMNLP (Findings) (2023)
Costas Mavromatis, Prasanna Lakkur Subramanyam, Vassilis N. Ioannidis, Adesoji Adeshina, Phillip R. Howard, Tetiana Grinberg, Nagib Hakim, George Karypis
TempoQR: Temporal Question Reasoning over Knowledge Graphs. AAAI (2022)
Gadi Singer, Joscha Bach, Tetiana Grinberg, Nagib Hakim, Phillip R. Howard, Vasudev Lal, Zev Rivlin
Thrill-K Architecture: Towards a Solution to the Problem of Knowledge Based Understanding. AGI (2022)
Saurav Sahay, Eda Okur, Nagib Hakim, Lama Nachman
Semi-supervised Interactive Intent Labeling. CoRR (2021)
Costas Mavromatis, Prasanna Lakkur Subramanyam, Vassilis N. Ioannidis, Soji Adeshina, Phillip R. Howard, Tetiana Grinberg, Nagib Hakim, George Karypis
TempoQR: Temporal Question Reasoning over Knowledge Graphs. CoRR (2021)
Francisco E. Rangel-Patino, Andres Viveros-Wacher, José Ernesto Rayas-Sánchez, Ismael Duron-Rosales, Edgar-Andrei Vega-Ochoa, Nagib Hakim, Enrique Lopez-Miralrio
A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation. IEEE Trans. Emerg. Top. Comput. 8 (2) (2020)
Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Andres Viveros-Wacher, José Luis Chavez-Hurtado, Edgar-Andrei Vega-Ochoa, Nagib Hakim
Post-Silicon Receiver Equalization Metamodeling by Artificial Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (4) (2019)
Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Nagib Hakim
Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation. ITC (2018)
Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Edgar-Andrei Vega-Ochoa, Nagib Hakim
Direct optimization of a PCI express link equalization in industrial post-silicon validation. LATS (2018)
Naveen Suda, Jounghyuk Suh, Nagib Hakim, Yu Cao, Bertan Bakkaloglu
A 65 nm Programmable ANalog Device Array (PANDA) for Analog Circuit Emulation. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2016)
David Lin, Ted Hong, Yanjing Li, Eswaran S, Sharad Kumar, Farzan Fallah, Nagib Hakim, Donald S. Gardner, Subhasish Mitra
Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (10) (2014)
David Lin, Ted Hong, Yanjing Li, Farzan Fallah, Donald S. Gardner, Nagib Hakim, Subhasish Mitra
Overcoming post-silicon validation challenges through quick error detection (QED). DATE (2013)
Jounghyuk Suh, Naveen Suda, Cheng Xu, Nagib Hakim, Yu Cao, Bertan Bakkaloglu
Programmable ANalog Device Array (PANDA): A Methodology for Transistor-Level Analog Emulation. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2013)
Nagib Hakim, Charles Meissner
Innovative practices session 1C: Post-silicon validation. VTS (2013)
Subhasish Mitra, David Lin, Nagib Hakim, Donald S. Gardner
Bug localization techniques for effective post-silicon validation. ASP-DAC (2012)
Nagib Hakim, A. Bhaduri, K. Donepudi, S. Bodapati
A hybrid electrical-behavioral modeling approach for pre- and post-silicon electrical validation. CICC (2012)
David Lin, Ted Hong, Farzan Fallah, Nagib Hakim, Subhasish Mitra
Quick detection of difficult bugs for effective post-silicon validation. DAC (2012)
Rui Zheng, Jounghyuk Suh, Cheng Xu, Nagib Hakim, Bertan Bakkaloglu, Yu Cao
Programmable analog device array (PANDA): a platform for transistor-level analog reconfigurability. DAC (2011)
Ted Hong, Yanjing Li, Sung-Boem Park, Diana Mui, David Lin, Ziyad Abdel Kaleq, Nagib Hakim, Helia Naeimi, Donald S. Gardner, Subhasish Mitra
QED: Quick Error Detection tests for effective post-silicon validation. ITC (2010)
Jagannath Keshava, Nagib Hakim, Chinna Prudvi
Post-silicon validation challenges: how EDA and academia can help. DAC (2010)
Pongstorn Maidee, Nagib Hakim, Kia Bazargan
FPGA family composition and effects of specialized blocks. FPL (2008)
Chirayu S. Amin, Noel Menezes, Kip Killpack, Florentin Dartu, Umakanta Choudhury, Nagib Hakim, Yehea I. Ismail
Statistical static timing analysis: how simple can we get? DAC (2005)
Ali Keshavarzi, Gerhard Schrom, Stephen Tang, Sean Ma, Keith A. Bowman, Sunit Tyagi, Kevin Zhang, Tom Linton, Nagib Hakim, Steven G. Duvall, John Brews, Vivek De
Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage. ISLPED (2005)
Sani R. Nassif, Duane S. Boning, Nagib Hakim
The care and feeding of your statistical static timer. ICCAD (2004)
Nagib Hakim
Coping with Uncertainty. ISQED (2004)