Helia Naeimi

Publication Activity (10 Years)

Years Active: 2004-2017
Publications (10 Years): 8

Top Topics

Energy Efficient

Probabilistic Approaches

Countermeasures

Top Venues

IEEE J. Emerg. Sel. Topics Circuits Syst.

Publications

Elizabeth Reed, Alaa R. Alameldeen, Helia Naeimi, Patrick Stolt
Probabilistic replacement strategies for improving the lifetimes of NVM-based caches. MEMSYS (2017)
Nitin Rathi, Swaroop Ghosh, Anirudh Iyengar, Helia Naeimi
Data privacy in non-volatile cache: Challenges, attack models and solutions. ASP-DAC (2016)
Ashwin Chintaluri, Helia Naeimi, Suriyaprakash Natarajan, Arijit Raychowdhury
Analysis of Defects and Variations in Embedded Spin Transfer Torque (STT) MRAM Arrays. IEEE J. Emerg. Sel. Topics Circuits Syst. 6 (3) (2016)
Nitin Rathi, Helia Naeimi, Swaroop Ghosh
Side Channel Attacks on STTRAM and Low-Overhead Countermeasures. CoRR (2016)
Nitin Rathi, Asmit De, Helia Naeimi, Swaroop Ghosh
Cache Bypassing and Checkpointing to Circumvent Data Security Attacks on STTRAM. CoRR (2016)
Ralph Nathan, Helia Naeimi, Daniel J. Sorin, Xiaobai Sun
Profile-Driven Automated Mixed Precision. CoRR (2016)
Fabian Oboril, Fazal Hameed, Rajendra Bishnoi, Ali Ahari, Helia Naeimi, Mehdi Baradaran Tahoori
Normally-OFF STT-MRAM Cache with Zero-Byte Compression for Energy Efficient Last-Level Caches. ISLPED (2016)
Anirudh Iyengar, Swaroop Ghosh, Nitin Rathi, Helia Naeimi
Side channel attacks on STTRAM and low-overhead countermeasures. DFT (2016)
Ashwin Chintaluri, Abhinav Parihar, Suriyaprakash Natarajan, Helia Naeimi, Arijit Raychowdhury
A Model Study of Defects and Faults in Embedded Spin Transfer Torque (STT) MRAM Arrays. ATS (2015)
Siva Kumar Sastry Hari, Radha Venkatagiri, Sarita V. Adve, Helia Naeimi
GangES: Gang error simulation for hardware resiliency evaluation. ISCA (2014)
Ralph Nathan, Bryan Anthonio, Shih-Lien Lu, Helia Naeimi, Daniel J. Sorin, Xiaobai Sun
Recycled Error Bits: Energy-Efficient Architectural Support for Floating Point Accuracy. SC (2014)
Ralph Nathan, Bryan Anthonio, Shih-Lien Lu, Helia Naeimi, Daniel J. Sorin, Xiaobai Sun
Recycled Error Bits: Energy-Efficient Architectural Support for Higher Precision Floating Point. CoRR (2013)
Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi, Pradeep Ramachandran
Relyzer: Application Resiliency Analyzer for Transient Faults. IEEE Micro 33 (3) (2013)
Helia Naeimi, Suriya Natarajan, Kushagra Vaid, Prabhakar Kudva, Mahesh Natu
Innovative practices session 5C: Cloud atlas - Unreliability through massive connectivity. VTS (2013)
Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi
Low-cost program-level detectors for reducing silent data corruptions. DSN (2012)
Siva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi, Pradeep Ramachandran
Relyzer: exploiting application-level fault equivalence to analyze application resiliency to transient faults. ASPLOS (2012)
Chia-Hsiang Chen, Yejoong Kim, Zhengya Zhang, David T. Blaauw, Dennis Sylvester, Helia Naeimi, Sumeet Sandhu
A confidence-driven model for error-resilient computing. DATE (2011)
Ted Hong, Yanjing Li, Sung-Boem Park, Diana Mui, David Lin, Ziyad Abdel Kaleq, Nagib Hakim, Helia Naeimi, Donald S. Gardner, Subhasish Mitra
QED: Quick Error Detection tests for effective post-silicon validation. ITC (2010)
Nicholas P. Carter, Helia Naeimi, Donald S. Gardner
Design techniques for cross-layer resilience. DATE (2010)
Helia Naeimi, André DeHon
Fault Secure Encoder and Decoder for NanoMemory Applications. IEEE Trans. Very Large Scale Integr. Syst. 17 (4) (2009)
Helia Naeimi, André DeHon
Fault tolerant nano-memory with fault secure encoder and decoder. Nano-Net (2007)
Helia Naeimi, André DeHon
Fault Secure Encoder and Decoder for Memory Applications. DFT (2007)
André DeHon, Helia Naeimi
Seven Strategies for Tolerating Highly Defective Fabrication. IEEE Des. Test Comput. 22 (4) (2005)
André DeHon, Joshua Adams, Michael DeLorimier, Nachiket Kapre, Yuki Matsuda, Helia Naeimi, Michael C. Vanier, Michael G. Wrighton
Design Patterns for Reconfigurable Computing. FCCM (2004)
Helia Naeimi, André DeHon
A greedy algorithm for tolerating defective crosspoints in nanoPLA design. FPT (2004)