Rajendra Bishnoi

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 78

Top Topics

Write Operations

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

ACM J. Emerg. Technol. Comput. Syst.

Publications

Sumit Diware, Koteswararao Chilakala, Rajiv V. Joshi, Said Hamdioui, Rajendra Bishnoi
Reliable and Energy-Efficient Diabetic Retinopathy Screening Using Memristor-Based Neural Networks. IEEE Access 12 (2024)
Muhammad Ali Siddiqi, David Vrijenhoek, Lennart P. L. Landsmeer, Job van der Kleij, Anteneh Gebregiorgis, Vincenzo Romano, Rajendra Bishnoi, Said Hamdioui, Christos Strydis
A Lightweight Architecture for Real-Time Neuronal-Spike Classification. CF (2024)
Sumit Diware, Mohammad Amin Yaldagard, Anteneh Gebregiorgis, Rajiv V. Joshi, Said Hamdioui, Rajendra Bishnoi
Dynamic Detection and Mitigation of Read-disturb for Accurate Memristor-based Neural Networks. AICAS (2024)
Muhammad Ali Siddiqi, Jan Andrés Galvan Hernández, Anteneh Gebregiorgis, Rajendra Bishnoi, Christos Strydis, Said Hamdioui, Mottaqiallah Taouil
Memristor-Based Lightweight Encryption. CoRR (2024)
Rajendra Bishnoi, Sumit Diware, Anteneh Gebregiorgis, Simon Thomann, Sara Mannaa, Bastien Deveautour, Cédric Marchand, Alberto Bosio, Damien Deleruyelle, Ian O'Connor, Hussam Amrouch, Said Hamdioui
Energy-efficient Computation-In-Memory Architecture using Emerging Technologies. ICM (2023)
Abhairaj Singh, Rajendra Bishnoi, Ali Kaichouhi, Sumit Diware, Rajiv V. Joshi, Said Hamdioui
Computation-in-Memory using Ring-Oscillator based ADC for Edge AI. AICAS (2023)
Sumit Diware, Abhairaj Singh, Anteneh Gebregiorgis, Rajiv V. Joshi, Said Hamdioui, Rajendra Bishnoi
Accurate and Energy-Efficient Bit-Slicing for RRAM-Based Neural Networks. IEEE Trans. Emerg. Top. Comput. Intell. 7 (1) (2023)
Mohammad Amin Yaldagard, Sumit Diware, Rajiv V. Joshi, Said Hamdioui, Rajendra Bishnoi
Read-disturb Detection Methodology for RRAM-based Computation-in-Memory Architecture. AICAS (2023)
Manil Dev Gomony, Anteneh Gebregiorgis, Moritz Fieback, Marc Geilen, Sander Stuijk, Jan Richter-Brockmann, Rajendra Bishnoi, Sven Argo, Lara Arche Andradas, Tim Güneysu, Mottaqiallah Taouil, Henk Corporaal, Said Hamdioui
Dependability of Future Edge-AI Processors: Pandora's Box. ETS (2023)
Hassen Aziza, Cristian Zambelli, Said Hamdioui, Sumit Diware, Rajendra Bishnoi, Anteneh Gebregiorgis
On the Reliability of RRAM-Based Neural Networks. VLSI-SoC (2023)
Sumit Diware, Sudeshna Dash, Anteneh Gebregiorgis, Rajiv V. Joshi, Christos Strydis, Said Hamdioui, Rajendra Bishnoi
Severity-Based Hierarchical ECG Classification Using Neural Networks. IEEE Trans. Biomed. Circuits Syst. 17 (1) (2023)
Muhammad Ali Siddiqi, David Vrijenhoek, Lennart P. L. Landsmeer, Job van der Kleij, Anteneh Gebregiorgis, Vincenzo Romano, Rajendra Bishnoi, Said Hamdioui, Christos Strydis
A Lightweight Architecture for Real-Time Neuronal-Spike Classification. CoRR (2023)
Muhammad Ali Siddiqi, Jan Andrés Galvan Hernández, Anteneh Gebreziorgis, Rajendra Bishnoi, Christos Strydis, Said Hamdioui, Mottaqiallah Taouil
Memristor-Based Lightweight Encryption. DSD (2023)
Sumit Diware, Anteneh Gebregiorgis, Rajiv V. Joshi, Said Hamdioui, Rajendra Bishnoi
Mapping-aware Biased Training for Accurate Memristor-based Neural Networks. AICAS (2023)
Manil Dev Gomony, Floran de Putter, Anteneh Gebregiorgis, Gianna Paulin, Linyan Mei, Vikram Jain, Said Hamdioui, Victor Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Friedemann Zenke, Frank Gurkaynak, Barry de Bruin, Sander Stuijk, Simon Davidson, Sayandip De, Mounir Ghogho, Alexandra Jimborean, Sherif Eissa, Luca Benini, Dimitrios Soudris, Rajendra Bishnoi, Sam Ainsworth, Federico Corradi, Ouassim Karrakchou, Tim Güneysu, Henk Corporaal
PetaOps/W edge-AI $\mu$ Processors: Myth or reality? DATE (2023)
Abhairaj Singh, Rajendra Bishnoi, Rajiv V. Joshi, Said Hamdioui
Referencing-in-Array Scheme for RRAM-based CIM Architecture. DATE (2022)
Mahta Mayahinia, Abhairaj Singh, Christopher Bengel, Stefan Wiefels, Muath Abu Lebdeh, Stephan Menzel, Dirk J. Wouters, Anteneh Gebregiorgis, Rajendra Bishnoi, Rajiv V. Joshi, Said Hamdioui
A Voltage-Controlled, Oscillation-Based ADC Design for Computation-in-Memory Architectures Using Emerging ReRAMs. ACM J. Emerg. Technol. Comput. Syst. 18 (2) (2022)
Anteneh Gebregiorgis, Hoang Anh Du Nguyen, Jintao Yu, Rajendra Bishnoi, Mottaqiallah Taouil, Francky Catthoor, Said Hamdioui
A Survey on Memory-centric Computer Architectures. ACM J. Emerg. Technol. Comput. Syst. 18 (4) (2022)
Manil Gomony, Floran de Putter, Anteneh Gebregiorgis, Gianna Paulin, L. Mei, V. Jain, Said Hamdioui, V. Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Frank K. Zenke, F. Gurkaynak, Barry de Bruin, Sander Stuijk, S. Davidson, S. De, M. Ghogho, A. Jimborean, Sherif Eissa, Luca Benini, Dimitrios Soudris, Rajendra Bishnoi, S. Ainsworth, Federico Corradi, O. Karrakchou, Tim Güneysu, Henk Corporaal
CONVOLVE: Smart and seamless design of smart edge processors. CoRR (2022)
Moritz Fieback, Guilherme Cardoso Medeiros, Lizhou Wu, Hassen Aziza, Rajendra Bishnoi, Mottaqiallah Taouil, Said Hamdioui
Defects, Fault Modeling, and Test Development Framework for RRAMs. ACM J. Emerg. Technol. Comput. Syst. 18 (3) (2022)
Anteneh Gebregiorgis, Abhairaj Singh, Sumit Diware, Rajendra Bishnoi, Said Hamdioui
Dealing with Non-Idealities in Memristor Based Computation-In-Memory Designs. VLSI-SoC (2022)
Abhairaj Singh, Mahdi Zahedi, Taha Shahroodi, Mohit Gupta, Anteneh Gebregiorgis, Manu Komalan, Rajiv V. Joshi, Francky Catthoor, Rajendra Bishnoi, Said Hamdioui
CIM-based Robust Logic Accelerator using 28 nm STT-MRAM Characterization Chip Tape-out. AICAS (2022)
Abhairaj Singh, Moritz Fieback, Rajendra Bishnoi, Filip Bradaric, Anteneh Gebregiorgis, Rajiv V. Joshi, Said Hamdioui
Accelerating RRAM Testing with a Low-cost Computation-in-Memory based DFT. ITC (2022)
Christopher Bengel, Johannes Mohr, Stefan Wiefels, Abhairaj Singh, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Rainer Waser, Dirk J. Wouters, Stephan Menzel
Reliability aspects of binary vector-matrix-multiplications using ReRAM devices. Neuromorph. Comput. Eng. 2 (3) (2022)
Abhairaj Singh, Sumit Diware, Anteneh Gebregiorgis, Rajendra Bishnoi, Francky Catthoor, Rajiv V. Joshi, Said Hamdioui
Low-Power Memristor-Based Computing for Edge-AI Applications. ISCAS (2021)
Abhairaj Singh, Muath Abu Lebdeh, Anteneh Gebregiorgis, Rajendra Bishnoi, Rajiv V. Joshi, Said Hamdioui
SRIF: Scalable and Reliable Integrate and Fire Circuit ADC for Memristor-Based CIM Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (5) (2021)
Patrick Girard, Yuanqing Cheng, Arnaud Virazel, Wei Zhao, Rajendra Bishnoi, Mehdi B. Tahoori
A Survey of Test and Reliability Solutions for Magnetic Random Access Memories. Proc. IEEE 109 (2) (2021)
Sumit Diware, Anteneh Gebregiorgis, Rajiv V. Joshi, Said Hamdioui, Rajendra Bishnoi
Unbalanced Bit-slicing Scheme for Accurate Memristor-based Neural Network Architecture. AICAS (2021)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi B. Tahoori, Houman Zahedmanesh, Kristof Croes, Kevin Garello, Gouri Sankar Kar, Francky Catthoor
Physics based modeling of bimodal electromigration failure distributions and variation analysis for VLSI interconnects. IRPS (2020)
Samir Ben Dodo, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Secure STT-MRAM Bit-Cell Design Resilient to Differential Power Analysis Attacks. IEEE Trans. Very Large Scale Integr. Syst. 28 (1) (2020)
Moritz Fieback, Surya Nagarajan, Rajendra Bishnoi, Mehdi B. Tahoori, Mottaqiallah Taouil, Said Hamdioui
Testing Scouting Logic-Based Computation-in-Memory Architectures. ETS (2020)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Arunkumar Vijayan, Mehdi Baradaran Tahoori
Dynamic Faults based Hardware Trojan Design in STT-MRAM. DATE (2020)
Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, Guillaume Patrigeon, Pascal Benoit, Gregory di Pendina, Guillaume Prenat
A Universal Spintronic Technology based on Multifunctional Standardized Stack. DATE (2020)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Mitigating Read Failures in STT-MRAM. VTS (2020)
Nour Sayed, Rajendra Bishnoi, Mehdi B. Tahoori
Approximate Spintronic Memories. ACM J. Emerg. Technol. Comput. Syst. 16 (4) (2020)
Ahmet Turan Erozan, Dennis D. Weller, Farhan Rasheed, Rajendra Bishnoi, Jasmin Aghassi-Hagmann, Mehdi Baradaran Tahoori
A Novel Printed-Lookup-Table-Based Programmable Printed Digital Circuit. IEEE Trans. Very Large Scale Integr. Syst. 28 (6) (2020)
Farhan Rasheed, Michael Hefenbrock, Rajendra Bishnoi, Michael Beigl, Jasmin Aghassi-Hagmann, Mehdi Baradaran Tahoori
Crossover-aware Placement and Routing for Inkjet Printed Circuits. ACM J. Emerg. Technol. Comput. Syst. 16 (2) (2020)
Christopher Münch, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Tolerating Retention Failures in Neuromorphic Fabric based on Emerging Resistive Memories. ASP-DAC (2020)
Ahmet Turan Erozan, Guan Ying Wang, Rajendra Bishnoi, Jasmin Aghassi-Hagmann, Mehdi Baradaran Tahoori
A Compact Low-Voltage True Random Number Generator Based on Inkjet Printing Technology. IEEE Trans. Very Large Scale Integr. Syst. 28 (6) (2020)
Rajendra Bishnoi, Lizhou Wu, Moritz Fieback, Christopher Münch, Sarath Mohanachandran Nair, Mehdi Baradaran Tahoori, Ying Wang, Huawei Li, Said Hamdioui
Special Session - Emerging Memristor Based Memory and CIM Architecture: Test, Repair and Yield Analysis. VTS (2020)
Anteneh Gebregiorgis, Rajendra Bishnoi, Mehdi Baradaran Tahoori
A Comprehensive Reliability Analysis Framework for NTC Caches: A System to Device Approach. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (3) (2019)
Farhan Rasheed, Michael Hefenbrock, Rajendra Bishnoi, Michael Beigl, Jasmin Aghassi-Hagmann, Mehdi Baradaran Tahoori
Predictive Modeling and Design Automation of Inorganic Printed Electronics. DATE (2019)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Houman Zahedmanesh, Kristof Croes, Kevin Garello, Gouri Sankar Kar, Francky Catthoor
Variation-Aware Physics-Based Electromigration Modeling and Experimental Calibration for VLSI Interconnects. IRPS (2019)
Ahmet Turan Erozan, Rajendra Bishnoi, Jasmin Aghassi-Hagmann, Mehdi Baradaran Tahoori
Inkjet-Printed True Random Number Generator based on Additive Resistor Tuning. DATE (2019)
Nour Sayed, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Fast and Reliable STT-MRAM Using Nonuniform and Adaptive Error Detecting and Correcting Scheme. IEEE Trans. Very Large Scale Integr. Syst. 27 (6) (2019)
Christopher Münch, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Reliable in-memory neuromorphic computing using spintronics. ASP-DAC (2019)
Samir Ben Dodo, Rajendra Bishnoi, Sarath Mohanachandran Nair, Mehdi Baradaran Tahoori
A Spintronics Memory PUF for Resilience Against Cloning Counterfeit. IEEE Trans. Very Large Scale Integr. Syst. 27 (11) (2019)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Hayk T. Grigoryan, Grigor Tshagharyan
Variation-aware Fault Modeling and Test Generation for STT-MRAM. IOLTS (2019)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori
A Comprehensive Framework for Parametric Failure Modeling and Yield Analysis of STT-MRAM. IEEE Trans. Very Large Scale Integr. Syst. 27 (7) (2019)
Nour Sayed, Longfei Mao, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Compiler-Assisted and Profiling-Based Analysis for Fast and Efficient STT-MRAM On-Chip Cache Design. ACM Trans. Design Autom. Electr. Syst. 24 (4) (2019)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Grigor Tshagharyan, Hayk T. Grigoryan, Gurgen Harutyunyan, Yervant Zorian
Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM. ITC (2018)
Ahmet Turan Erozan, Gabriel Cadilha Marques, Mohammad Saber Golanbari, Rajendra Bishnoi, Simone Dehm, Jasmin Aghassi-Hagmann, Mehdi Baradaran Tahoori
Inkjet-Printed EGFET-Based Physical Unclonable Function - Design, Evaluation, and Fabrication. IEEE Trans. Very Large Scale Integr. Syst. 26 (12) (2018)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Parametric failure modeling and yield analysis for STT-MRAM. DATE (2018)
Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian, Anteneh Gebregiorgis, Mohammad Saber Golanbari, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Modeling and Testing of Aging Faults in FinFET Memories for Automotive Applications. ITC (2018)
Nour Sayed, Rajendra Bishnoi, Fabian Oboril, Mehdi Baradaran Tahoori
A cross-layer adaptive approach for performance and power optimization in STT-MRAM. DATE (2018)
Nour Sayed, Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Process variation and temperature aware adaptive scrubbing for retention failures in STT-MRAM. ASP-DAC (2018)
Christopher Münch, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Multi-bit non-volatile spintronic flip-flop. DATE (2018)
Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat
Using multifunctional standardized stack as universal spintronic technology for IoT. DATE (2018)
Mohammad Saber Golanbari, Saman Kiamehr, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Reliable memory PUF design for low-power applications. ISQED (2018)
Anteneh Gebregiorgis, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Spintronic normally-off heterogeneous system-on-chip design. DATE (2018)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Mohammad Saber Golanbari, Fabian Oboril, Fazal Hameed, Mehdi Baradaran Tahoori
VAET-STT: Variation Aware STT-MRAM Analysis and Design Space Exploration Tool. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (7) (2018)
Ahmet Turan Erozan, Mohammad Saber Golanbari, Rajendra Bishnoi, Jasmin Aghassi-Hagmann, Mehdi Baradaran Tahoori
Design and evaluation of physical unclonable function for inorganic printed electronics. ISQED (2018)
Rajendra Bishnoi, Fabian Oboril, Mehdi Baradaran Tahoori
Design of Defect and Fault-Tolerant Nonvolatile Spintronic Flip-Flops. IEEE Trans. Very Large Scale Integr. Syst. 25 (4) (2017)
Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Guillaume Prenat
GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack. ISVLSI (2017)
Nour Sayed, Fabian Oboril, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Leveraging Systematic Unidirectional Error-Detecting Codes for fast STT-MRAM cache. VTS (2017)
Nour Sayed, Fabian Oboril, Azadeh Shirvanian, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Exploiting STT-MRAM for approximate computing. ETS (2017)
Sparsh Mittal, Rajendra Bishnoi, Fabian Oboril, Haonan Wang, Mehdi Baradaran Tahoori, Adwait Jog, Jeffrey S. Vetter
Architecting SOT-RAM Based GPU Register File. ISVLSI (2017)
Nour Sayed, Mojtaba Ebrahimi, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Opportunistic write for fast and reliable STT-MRAM. DATE (2017)
Sarath Mohanachandran Nair, Rajendra Bishnoi, Mohammad Saber Golanbari, Fabian Oboril, Mehdi Baradaran Tahoori
VAET-STT: A variation aware estimator tool for STT-MRAM based memories. DATE (2017)
Rajendra Bishnoi, Fabian Oboril, Mehdi Baradaran Tahoori
Non-Volatile Non-Shadow flip-flop using Spin Orbit Torque for efficient normally-off computing. ASP-DAC (2016)
Guillaume Prenat, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Fabian Oboril, Rajendra Bishnoi, Mojtaba Ebrahimi, Nathalie Lamard, Olivier Boulle, Kevin Garello, Juergen Langer, Berthold Ocker, Marie-Claire Cyrille, Pietro Gambardella, Mehdi Baradaran Tahoori, Gilles Gaudin
Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing. IEEE Trans. Multi Scale Comput. Syst. 2 (1) (2016)
Rajendra Bishnoi, Fabian Oboril, Mehdi Baradaran Tahoori
Low-Power Multi-Port Memory Architecture based on Spin Orbit Torque Magnetic Devices. ACM Great Lakes Symposium on VLSI (2016)
Rajendra Bishnoi, Fabian Oboril, Mehdi Baradaran Tahoori
Fault Tolerant Non-Volatile spintronic flip-flop. DATE (2016)
Mojtaba Ebrahimi, Hossein Asadi, Rajendra Bishnoi, Mehdi Baradaran Tahoori
Layout-Based Modeling and Mitigation of Multiple Event Transients. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (3) (2016)
Anteneh Gebregiorgis, Saman Kiamehr, Fabian Oboril, Rajendra Bishnoi, Mehdi Baradaran Tahoori
A cross-layer analysis of Soft Error, aging and process variation in Near Threshold Computing. DATE (2016)
Fabian Oboril, Fazal Hameed, Rajendra Bishnoi, Ali Ahari, Helia Naeimi, Mehdi Baradaran Tahoori
Normally-OFF STT-MRAM Cache with Zero-Byte Compression for Energy Efficient Last-Level Caches. ISLPED (2016)
Rajendra Bishnoi, Fabian Oboril, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori
Self-Timed Read and Write Operations in STT-MRAM. IEEE Trans. Very Large Scale Integr. Syst. 24 (5) (2016)
Fabian Oboril, Rajendra Bishnoi, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori
Evaluation of Hybrid Memory Technologies Using SOT-MRAM for On-Chip Cache Hierarchy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (3) (2015)
Rajendra Bishnoi, Mojtaba Ebrahimi, Fabian Oboril, Mehdi Baradaran Tahoori
Read disturb fault detection in STT-MRAM. ITC (2014)
Rajendra Bishnoi, Mojtaba Ebrahimi, Fabian Oboril, Mehdi Baradaran Tahoori
Architectural aspects in design and analysis of SOT-based memories. ASP-DAC (2014)
Rajendra Bishnoi, Fabian Oboril, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori
Avoiding unnecessary write operations in STT-MRAM for low power implementation. ISQED (2014)
Rajendra Bishnoi, Mojtaba Ebrahimi, Fabian Oboril, Mehdi Baradaran Tahoori
Asynchronous Asymmetrical Write Termination (AAWT) for a low power STT-MRAM. DATE (2014)