Kotb Jabeur

Publication Activity (10 Years)

Years Active: 2009-2018
Publications (10 Years): 7

Top Topics

Power Consumption

Top Venues

IEEE J. Emerg. Sel. Topics Circuits Syst.

IEEE Trans. Multi Scale Comput. Syst.

Publications

Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat
Using multifunctional standardized stack as universal spintronic technology for IoT. DATE (2018)
Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Guillaume Prenat
GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack. ISVLSI (2017)
Guillaume Prenat, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Fabian Oboril, Rajendra Bishnoi, Mojtaba Ebrahimi, Nathalie Lamard, Olivier Boulle, Kevin Garello, Juergen Langer, Berthold Ocker, Marie-Claire Cyrille, Pietro Gambardella, Mehdi Baradaran Tahoori, Gilles Gaudin
Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing. IEEE Trans. Multi Scale Comput. Syst. 2 (1) (2016)
Christophe Layer, Laurent Becker, Kotb Jabeur, Sylvain Claireux, Bernard Dieny, Guillaume Prenat, Gregory di Pendina, Stephane Gros, Pierre Paoli, Virgile Javerliac, Fabrice Bernard-Granger, Loïc Decloedt
Reducing System Power Consumption Using Check-Pointing on Nonvolatile Embedded Magnetic Random Access Memories. ACM J. Emerg. Technol. Comput. Syst. 12 (4) (2016)
Christophe Layer, Kotb Jabeur, Laurent Becker, Bernard Dieny, Stephane Gros, Virgile Javerliac, Pierre Paoli, Fabrice Bernard-Granger
Hybrid STT/CMOS Design of an Interrupt Based Instant On/Off Mechanism for Low-Power SoC. ISVLSI (2015)
Christophe Layer, Kotb Jabeur, Stephane Gros, Laurent Becker, Pierre Paoli, Fabrice Bernard-Granger, Virgile Javerliac, Bernard Dieny
Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks. NEWCAS (2015)
Nataliya Yakymets, Ian O'Connor, Kotb Jabeur, Sébastien Le Beux
Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse. IEEE J. Emerg. Sel. Topics Circuits Syst. 5 (1) (2015)
Gregory di Pendina, Kotb Jabeur, Guillaume Prenat
Hybrid CMOS/magnetic Process Design Kit and SOT-based non-volatile standard cell architectures. ASP-DAC (2014)
Kotb Jabeur, Ian O'Connor, Nataliya Yakymets
Functions classification approach to generate reconfigurable fine-grain logic based on Ambipolar Independent Double Gate FET (Am-IDGFET). Microelectron. J. 44 (12) (2013)
Kotb Jabeur, Ian O'Connor, Sébastien Le Beux, David Navarro
Ambipolar double gate CNTFETs based reconfigurable logic cells. NANOARCH (2012)
Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux
Ambipolar double-gate FETs for the design of compact logic structures. ACM Great Lakes Symposium on VLSI (2012)
Ian O'Connor, Kotb Jabeur, Sébastien Le Beux, David Navarro
Ambipolar independent double gate FET logic. NANOARCH (2012)
Kotb Jabeur, Ian O'Connor, David Navarro, Sébastien Le Beux
Low-power design technique with ambipolar double gate devices. NANOARCH (2012)
Nataliya Yakymets, Sébastien Le Beux, Kotb Jabeur, Ian O'Connor
Multi-objective mapping for matrix-based nanocomputer architectures. ReCoSoC (2011)
Kotb Jabeur, Ian O'Connor, Nataliya Yakymets, Sébastien Le Beux
High performance 4: 1 multiplexer with ambipolar double-gate FETs. ICECS (2011)
Kotb Jabeur, Nataliya Yakymets, Ian O'Connor, Sébastien Le Beux
Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells. NANOARCH (2011)
Kotb Jabeur, Nataliya Yakymets, Ian O'Connor, Sébastien Le Beux
Fine-grain reconfigurable logic cells based on double-gate CNTFETs. ACM Great Lakes Symposium on VLSI (2011)
Kotb Jabeur, David Navarro, Ian O'Connor, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy
Reducing transistor count in clocked standard cells with ambipolar double-gate FETs. NANOARCH (2010)
Ian O'Connor, Kotb Jabeur, David Navarro, Nataliya Yakymets, Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy
Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics. ICECS (2010)
Ian O'Connor, Junchen Liu, Kotb Jabeur, Nataliya Yakymets, Renaud Daviot, David Navarro, Pierre-Emmanuel Gaillardon, Fabien Clermidy, Maimouna Amadou, Gabriela Nicolescu
Emerging Technologies and Nanoscale Computing Fabrics. VLSI-SoC (2009)