Low-power design technique with ambipolar double gate devices.

Kotb Jabeur Ian O'Connor David Navarro Sébastien Le Beux

Published in: NANOARCH (2012)

Keyphrases

low power
cmos technology
low power consumption
low cost
power consumption
nm technology

single chip
high speed
logic circuits
vlsi architecture
mixed signal
vlsi circuits

digital signal processing
power dissipation
power reduction
gate array
wireless transmission
mobile devices

high power
embedded systems
parallel processing
signal processing
real time
ultra low power