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Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse.
Nataliya Yakymets
Ian O'Connor
Kotb Jabeur
Sébastien Le Beux
Published in:
IEEE J. Emerg. Sel. Topics Circuits Syst. (2015)
Keyphrases
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real time
hardware and software
low cost
parallel architectures
massively parallel
image processing
learning objects
computer systems
hardware implementation
multi layer
computing power
software reuse
real time embedded
data sets
information systems
general purpose
database
computing systems