Gianna Paulin

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 17

Top Topics

Parallel Processing

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Francesco Conti, Gianna Paulin, Angelo Garofalo, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2-8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing. IEEE J. Solid State Circuits 59 (1) (2024)
Gianna Paulin, Paul Scheffler, Thomas Benz, Matheus A. Cavalcante, Tim Fischer, Manuel Eggimann, Yichao Zhang, Nils Wistoff, Luca Bertaccini, Luca Colagrande, Gianmarco Ottavi, Frank K. Gürkaynak, Davide Rossi, Luca Benini
Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET. CoRR (2024)
Gamze Islamoglu, Moritz Scherer, Gianna Paulin, Tim Fischer, Victor J. B. Jung, Angelo Garofalo, Luca Benini
ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers. ISLPED (2023)
Gamze Islamoglu, Moritz Scherer, Gianna Paulin, Tim Fischer, Victor J. B. Jung, Angelo Garofalo, Luca Benini
ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers. CoRR (2023)
Francesco Conti, Davide Rossi, Gianna Paulin, Anaelo Garofalo, Alfio Di Mauro, Georg Rutishauer, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Vincent Huard, Olivier Montfort, Lionel Jure, Nils Exibard, Pascal Gouedo, Mathieu Louvat, Emmanuel Botte, Luca Benini
A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing. ISSCC (2023)
Francesco Conti, Gianna Paulin, Davide Rossi, Alfio Di Mauro, Georg Rutishauser, Gianmarco Ottavi, Manuel Eggimann, Hayate Okuhara, Luca Benini
Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC with 2-to-8b DNN Acceleration and 30%-Boost Adaptive Body Biasing. CoRR (2023)
Manil Dev Gomony, Floran de Putter, Anteneh Gebregiorgis, Gianna Paulin, Linyan Mei, Vikram Jain, Said Hamdioui, Victor Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Friedemann Zenke, Frank Gurkaynak, Barry de Bruin, Sander Stuijk, Simon Davidson, Sayandip De, Mounir Ghogho, Alexandra Jimborean, Sherif Eissa, Luca Benini, Dimitrios Soudris, Rajendra Bishnoi, Sam Ainsworth, Federico Corradi, Ouassim Karrakchou, Tim Güneysu, Henk Corporaal
PetaOps/W edge-AI $\mu$ Processors: Myth or reality? DATE (2023)
Gianna Paulin, Francesco Conti, Lukas Cavigelli, Luca Benini
Vau da muntanialas: Energy-efficient multi-die scalable acceleration of RNN inference. CoRR (2022)
Manil Gomony, Floran de Putter, Anteneh Gebregiorgis, Gianna Paulin, L. Mei, V. Jain, Said Hamdioui, V. Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Frank K. Zenke, F. Gurkaynak, Barry de Bruin, Sander Stuijk, S. Davidson, S. De, M. Ghogho, A. Jimborean, Sherif Eissa, Luca Benini, Dimitrios Soudris, Rajendra Bishnoi, S. Ainsworth, Federico Corradi, O. Karrakchou, Tim Güneysu, Henk Corporaal
CONVOLVE: Smart and seamless design of smart edge processors. CoRR (2022)
Luca Bertaccini, Gianna Paulin, Tim Fischer, Stefan Mach, Luca Benini
MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V cores. CoRR (2022)
Gianna Paulin, Matheus A. Cavalcante, Paul Scheffler, Luca Bertaccini, Yichao Zhang, Frank K. Gürkaynak, Luca Benini
Soft Tiles: Capturing Physical Implementation Flexibility for Tightly-Coupled Parallel Processing Clusters. ISVLSI (2022)
Luca Bertaccini, Gianna Paulin, Tim Fischer, Stefan Mach, Luca Benini
MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V Cores. ARITH (2022)
Gianna Paulin, Matheus A. Cavalcante, Paul Scheffler, Luca Bertaccini, Yichao Zhang, Frank K. Gürkaynak, Luca Benini
Soft Tiles: Capturing Physical Implementation Flexibility for Tightly-Coupled Parallel Processing Clusters. CoRR (2022)
Gianna Paulin, Francesco Conti, Lukas Cavigelli, Luca Benini
Vau Da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (1) (2022)
Gianna Paulin, Renzo Andri, Francesco Conti, Luca Benini
RNN-Based Radio Resource Management on Multicore RISC-V Accelerator Architectures. IEEE Trans. Very Large Scale Integr. Syst. 29 (9) (2021)
Francesco Conti, Lukas Cavigelli, Gianna Paulin, Igor Susmelj, Luca Benini
, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference. CICC (2018)
Francesco Conti, Lukas Cavigelli, Gianna Paulin, Igor Susmelj, Luca Benini
, 3.08 Gop/s/mW @ 1.2 mW Accelerator for Near-Sensor Recurrent Neural Network Inference. CoRR (2017)