Linyan Mei

Publication Activity (10 Years)

Years Active: 2019-2023
Publications (10 Years): 22

Top Topics

Design Space Exploration

Hierarchically Organized

Simulated Annealing

Instruction Scheduling

Top Venues

IEEE J. Emerg. Sel. Topics Circuits Syst.

Publications

Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, Marian Verhelst
Stream: A Modeling Framework for Fine-grained Layer Fusion on Multi-core DNN Accelerators. ISPASS (2023)
Jun Yin, Linyan Mei, Andre Guntoro, Marian Verhelst
ACCO: Automated Causal CNN Scheduling Optimizer for Real-Time Edge Accelerators. ICCD (2023)
Victor J. B. Jung, Arne Symons, Linyan Mei, Marian Verhelst, Luca Benini
SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators. CoRR (2023)
Vikram Jain, Juan Sebastian P. Giraldo, Jaro De Roose, Linyan Mei, Bert Boons, Marian Verhelst
TinyVers: A Tiny Versatile System-on-chip with State-Retentive eMRAM for ML Inference at the Extreme Edge. CoRR (2023)
Vikram Jain, Juan Sebastian Piedrahita Giraldo, Jaro De Roose, Linyan Mei, Bert Boons, Marian Verhelst
TinyVers: A Tiny Versatile System-on-Chip With State-Retentive eMRAM for ML Inference at the Extreme Edge. IEEE J. Solid State Circuits 58 (8) (2023)
Manil Dev Gomony, Floran de Putter, Anteneh Gebregiorgis, Gianna Paulin, Linyan Mei, Vikram Jain, Said Hamdioui, Victor Sanchez, Tobias Grosser, Marc Geilen, Marian Verhelst, Friedemann Zenke, Frank Gurkaynak, Barry de Bruin, Sander Stuijk, Simon Davidson, Sayandip De, Mounir Ghogho, Alexandra Jimborean, Sherif Eissa, Luca Benini, Dimitrios Soudris, Rajendra Bishnoi, Sam Ainsworth, Federico Corradi, Ouassim Karrakchou, Tim Güneysu, Henk Corporaal
PetaOps/W edge-AI $\mu$ Processors: Myth or reality? DATE (2023)
Victor J. B. Jung, Arne Symons, Linyan Mei, Marian Verhelst, Luca Benini
SALSA: Simulated Annealing based Loop-Ordering Scheduler for DNN Accelerators. AICAS (2023)
Linyan Mei, Koen Goetschalckx, Arne Symons, Marian Verhelst
DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling. HPCA (2023)
Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, Marian Verhelst
Towards Heterogeneous Multi-core Accelerators Exploiting Fine-grained Scheduling of Layer-Fused Deep Neural Networks. CoRR (2022)
Linyan Mei, Huichu Liu, Tony F. Wu, H. Ekin Sumbul, Marian Verhelst, Edith Beigné
A Uniform Latency Model for DNN Accelerators with Diverse Architectures and Dataflows. DATE (2022)
Linyan Mei, Koen Goetschalckx, Arne Symons, Marian Verhelst
DeFiNES: Enabling Fast Exploration of the Depth-first Scheduling Space for DNN Accelerators through Analytical Modeling. CoRR (2022)
Vikram Jain, Juan Sebastian P. Giraldo, Jaro De Roose, Bert Boons, Linyan Mei, Marian Verhelst
TinyVers: A 0.8-17 TOPS/W, 1.7 μW-20 mW, Tiny Versatile System-on-chip with State-Retentive eMRAM for Machine Learning Inference at the Extreme Edge. VLSI Technology and Circuits (2022)
Ehab M. Ibrahim, Linyan Mei, Marian Verhelst
Taxonomy and Benchmarking of Precision-Scalable MAC Arrays Under Enhanced DNN Dataflow Representation. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (5) (2022)
Vikram Jain, Linyan Mei, Marian Verhelst
Analyzing the Energy-Latency-Area-Accuracy Trade-off Across Contemporary Neural Networks. AICAS (2021)
Arne Symons, Linyan Mei, Marian Verhelst
LOMA: Fast Auto-Scheduling on DNN Accelerators through Loop-Order-based Memory Allocation. AICAS (2021)
Linyan Mei, Pouya Houshmand, Vikram Jain, Juan Sebastian P. Giraldo, Marian Verhelst
ZigZag: Enlarging Joint Architecture-Mapping Design Space Exploration for DNN Accelerators. IEEE Trans. Computers 70 (8) (2021)
Man Shi, Pouya Houshmand, Linyan Mei, Marian Verhelst
Hardware-Efficient Residual Neural Network Execution in Line-Buffer Depth-First Processing. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (4) (2021)
Ehab M. Ibrahim, Linyan Mei, Marian Verhelst
Survey and Benchmarking of Precision-Scalable MAC Arrays for Embedded DNN Processing. CoRR (2021)
Steven Colleman, Thomas Verelst, Linyan Mei, Tinne Tuytelaars, Marian Verhelst
Processor Architecture Optimization for Spatially Dynamic Neural Networks. VLSI-SoC (2021)
Linyan Mei, Pouya Houshmand, Vikram Jain, Juan Sebastian P. Giraldo, Marian Verhelst
ZigZag: A Memory-Centric Rapid DNN Accelerator Design Space Exploration Framework. CoRR (2020)
Vincent Camus, Linyan Mei, Christian C. Enz, Marian Verhelst
Review and Benchmarking of Precision-Scalable Multiply-Accumulate Unit Architectures for Embedded Neural-Network Processing. IEEE J. Emerg. Sel. Topics Circuits Syst. 9 (4) (2019)
Linyan Mei, Mohit Dandekar, Dimitrios Rodopoulos, Jeremy Constantin, Peter Debacker, Rudy Lauwereins, Marian Verhelst
Sub-Word Parallel Precision-Scalable MAC Engines for Efficient Embedded DNN Inference. AICAS (2019)