André DeHon

ORCID

Publication Activity (10 Years)

Years Active: 1994-2024
Publications (10 Years): 38

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

FCCM

FPT

FPGA

Massachusetts Institute of Technology, Cambridge, MA, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, MA, USA

PHD

Publications

Dongjoon Park, André DeHon
REFINE: Runtime Execution Feedback for INcremental Evolution on FPGA Designs. FPGA (2024)
Yuanlong Xiao, Dongjoon Park, Zeyu Jason Niu, Aditya Hota, André DeHon
ExHiPR: Extended High-Level Partial Reconfiguration for Fast Incremental FPGA Compilation. ACM Trans. Reconfigurable Technol. Syst. 17 (2) (2024)
Dongjoon Park, Zhijing Yao, Yuanlong Xiao, André DeHon
Asymmetry in Butterfly Fat Tree FPGA NoC. ICFPT (2023)
Yuanlong Xiao, Eric Micallef, Andrew Butt, Matthew Hofmann, Marc Alston, Matthew Goldsmith, Andrew Merczynski-Hait, André DeHon
PLD: fast FPGA compilation to make reconfigurable acceleration compatible with modern incremental refinement software development. ASPLOS (2022)
Dongjoon Park, Yuanlong Xiao, André DeHon
Fast and Flexible FPGA Development using Hierarchical Partial Reconfiguration. FPT (2022)
Yuanlong Xiao, André DeHon
HiPR: Fast, Incremental Custom Partial Reconfiguration for HLS Developers. FPGA (2022)
Yuanlong Xiao, Aditya Hota, Dongjoon Park, André DeHon
HiPR: High-level Partial Reconfiguration for Fast Incremental FPGA Compilation. FPL (2022)
Nick Roessler, André DeHon
SCALPEL: Exploring the Limits of Tag-enforced Compartmentalization. ACM J. Emerg. Technol. Comput. Syst. 18 (1) (2022)
Nik Sultana, John Sonchack, Hans Giesen, Isaac Pedisich, Zhaoyang Han, Nishanth Shyamkumar, Shivani Burad, André DeHon, Boon Thau Loo
Flightplan: Dataplane Disaggregation and Placement for P4 Programs. NSDI (2021)
Nikos Vasilakis, Cristian-Alexandru Staicu, Grigoris Ntousakis, Konstantinos Kallas, Ben Karel, André DeHon, Michael Pradel
Preventing Dynamic Library Compromise on Node.js via RWX-Based Privilege Reduction. CCS (2021)
Eric Micallef, Yuanlong Xiao, André DeHon
HLS-Compatible, Embedded-Processor Stream Links. FCCM (2021)
João M. P. Cardoso, André DeHon, Laura Pozzi
Guest Editorial: IEEE TC Special Section on Compiler Optimizations for FPGA-Based Systems. IEEE Trans. Computers 70 (12) (2021)
Matthew Hofmann, Zhiyao Tang, Jonathan Orgill, Jonathan Nelson, David Glanzman, Brent Nelson, André DeHon
XBERT: Xilinx Logical-Level Bitstream Embedded RAM Transfusion. FCCM (2021)
André DeHon, Hans Giesen, Nik Sultana, Yuanlong Xiao
Meta-level issues in Offloading: Scoping, Composition, Development, and their Automation. CoRR (2021)
Nick Roessler, Lucas Atayde, Imani Palmer, Derrick Paul McKee, Jai Pandey, Vasileios P. Kemerlis, Mathias Payer, Adam Bates, Jonathan M. Smith, André DeHon, Nathan Dautenhahn
μSCOPE: A Methodology for Analyzing Least-Privilege Compartmentalization in Large Software Artifacts. RAID (2021)
Yuanlong Xiao, Syed Tousif Ahmed, André DeHon
Fast Linking of Separately-Compiled FPGA Blocks without a NoC. FPT (2020)
Nikos Vasilakis, Cristian-Alexandru Staicu, Greg Ntousakis, Konstantinos Kallas, Ben Karel, André DeHon, Michael Pradel
Mir: Automated Quantifiable Privilege Reduction Against Dynamic Library Compromise in JavaScript. CoRR (2020)
André DeHon
Introduction to Special Section on FCCM 2019. ACM Trans. Reconfigurable Technol. Syst. 13 (4) (2020)
Joel Hypolite, John Sonchack, Shlomo Hershkop, Nathan Dautenhahn, André DeHon, Jonathan M. Smith
DeepMatch: practical deep packet inspection in the data plane using network processors. CoNEXT (2020)
Vipula Sateesh, Connor Mckeon, Jared Winograd, André DeHon
Pipelined Parallel Finite Automata Evaluation. FPT (2019)
Yuanlong Xiao, Dongjoon Park, Andrew Butt, Hans Giesen, Zhaoyang Han, Rui Ding, Nevo Magnezi, Raphael Rubin, André DeHon
Reducing FPGA Compile Time with Separate Compilation for FPGA Building Blocks. FPT (2019)
Nikos Vasilakis, Ben Karel, Yash Palkhiwala, John Sonchack, André DeHon, Jonathan M. Smith
Ignis: scaling distribution-oblivious systems with light-touch distribution. PLDI (2019)
Dongjoon Park, Yuanlong Xiao, Nevo Magnezi, André DeHon
Case for Fast FPGA Compilation Using Partial Reconfiguration. FPL (2018)
Nick Roessler, André DeHon
Protecting the Stack with Metadata Policies and Tagged Hardware. IEEE Symposium on Security and Privacy (2018)
Nikos Vasilakis, Ben Karel, Nick Roessler, Nathan Dautenhahn, André DeHon, Jonathan M. Smith
BreakApp: Automated, Flexible Application Compartmentalization. NDSS (2018)
Hans Giesen, Lei Shi, John Sonchack, Anirudh Chelluri, Nishanth Prabhu, Nik Sultana, Latha A. Kant, Anthony J. McAuley, Alexander Poylisher, André DeHon, Boon Thau Loo
In-network computing to the rescue of faulty links. NetCompute@SIGCOMM (2018)
Hans Giesen, Benjamin Gojman, Raphael Rubin, Ji Kim, André DeHon
Continuous Online Self-Monitoring Introspection Circuitry for Timing Repair by Incremental Partial-Reconfiguration (COSMIC TRIP). ACM Trans. Reconfigurable Technol. Syst. 11 (1) (2018)
Nikos Vasilakis, Ben Karel, Nick Roessler, Nathan Dautenhahn, André DeHon, Jonathan M. Smith
Towards Fine-grained, Automated Application Compartmentalization. PLOS@SOSP (2017)
Hans Giesen, Raphael Rubin, Benjamin Gojman, André DeHon
Quality-Time Tradeoffs in Component-Specific Mapping: How to Train Your Dynamically Reconfigurable Array of Gates with Outrageous Network-delays. FPGA (2017)
Hans Giesen, Raphael Rubin, Benjamin Gojman, André DeHon
Self-Adaptive Timing Repair. IEEE Des. Test 34 (6) (2017)
Edin Kadric, David Lakata, André DeHon
Impact of Parallelism and Memory Architecture on FPGA Communication Energy. ACM Trans. Reconfigurable Technol. Syst. 9 (4) (2016)
Arthur Azevedo de Amorim, Nathan Collins, André DeHon, Delphine Demange, Catalin Hritcu, David Pichardie, Benjamin C. Pierce, Randy Pollack, Andrew Tolmach
A verified information-flow architecture. J. Comput. Secur. 24 (6) (2016)
Hans Giesen, Benjamin Gojman, Raphael Rubin, Ji Kim, André DeHon
Continuous Online Self-Monitoring Introspection Circuitry for Timing Repair by Incremental Partial-Reconfiguration (COSMIC TRIP). FCCM (2016)
David K. Wittenberg, Edin Kadric, André DeHon, Jonathan Edwards, Jeffrey Smith, Silviu Chiricescu
PERFECT case studies demonstrating order of magnitude reduction in power consumption. HPEC (2016)
André DeHon, Derek Chiou
Introduction to Special Issue on Reconfigurable Components with Source Code. ACM Trans. Reconfigurable Technol. Syst. 9 (3) (2016)
Peipei Zhou, Hyunseok Park, Zhenman Fang, Jason Cong, André DeHon
Energy Efficiency of Full Pipelining: A Case Study for Matrix Multiplication. FCCM (2016)
Timothy A. Linscott, Benjamin Gojman, Raphael Rubin, André DeHon
Pitfalls and Tradeoffs in Simultaneous, On-Chip FPGA Delay Measurement. FPGA (2016)
Edin Kadric, Paul Gurniak, André DeHon
Accurate Parallel Floating-Point Accumulation. IEEE Trans. Computers 65 (11) (2016)
Udit Dhawan, André DeHon
Area-Efficient Near-Associative Memories on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 7 (4) (2015)
Edin Kadric, David Lakata, André DeHon
Impact of Memory Architecture on FPGA Energy Consumption. FPGA (2015)
Arthur Azevedo de Amorim, Nathan Collins, André DeHon, Delphine Demange, Catalin Hritcu, David Pichardie, Benjamin C. Pierce, Randy Pollack, Andrew Tolmach
A Verified Information-Flow Architecture. CoRR (2015)
Udit Dhawan, Catalin Hritcu, Raphael Rubin, Nikos Vasilakis, Silviu Chiricescu, Jonathan M. Smith, Thomas F. Knight Jr., Benjamin C. Pierce, André DeHon
Architectural Support for Software-Defined Metadata Processing. ASPLOS (2015)
Benjamin Gojman, Sirisha Nalmela, Nikil Mehta, Nicholas Howarth, André DeHon
GROK-LAB: Generating Real On-chip Knowledge for Intra-cluster Delays Using Timing Extraction. ACM Trans. Reconfigurable Technol. Syst. 7 (4) (2015)
André DeHon
Fundamental Underpinnings of Reconfigurable Computing Architectures. Proc. IEEE 103 (3) (2015)
Hyunseok Park, Shreel Vijayvargiya, André DeHon
Energy minimization in the time-space continuum. FPT (2015)
Russell Tessier, Kenneth L. Pocek, André DeHon
Reconfigurable Computing Architectures. Proc. IEEE 103 (3) (2015)
Arthur Azevedo de Amorim, Nathan Collins, André DeHon, Delphine Demange, Catalin Hritcu, David Pichardie, Benjamin C. Pierce, Randy Pollack, Andrew Tolmach
A verified information-flow architecture. POPL (2014)
Benjamin Gojman, André DeHon
GROK-INT: Generating Real On-Chip Knowledge for Interconnect Delays Using Timing Extraction. FCCM (2014)
Udit Dhawan, Nikos Vasilakis, Raphael Rubin, Silviu Chiricescu, Jonathan M. Smith, Thomas F. Knight Jr., Benjamin C. Pierce, André DeHon
PUMP: a programmable unit for metadata processing. HASP@ISCA (2014)
Edin Kadric, Kunal Mahajan, André DeHon
Kung Fu Data Energy - Minimizing Communication Energy in FPGA Computations. FCCM (2014)
Edin Kadric, Kunal Mahajan, André DeHon
Energy Reduction through Differential Reliability and Lightweight Checking. FCCM (2014)
Albert Kwon, Kaiyu Zhang, Perk Lun Lim, Yuchen Pan, Jonathan M. Smith, André DeHon
RotoRouter: Router support for endpoint-authorized decentralized traffic filtering to prevent DoS attacks. FPT (2014)
André DeHon
Wordwidth, instructions, looping, and virtualization: the role of sharing in absolute energy minimization. FPGA (2014)
Edin Kadric, Paul Gurniak, André DeHon
Accurate Parallel Floating-Point Accumulation. IEEE Symposium on Computer Arithmetic (2013)
André DeHon, Nikil Mehta
Exploiting partially defective LUTs: Why you don't need perfect fabrication. FPT (2013)
André DeHon
Location, location, location: the role of spatial locality in asymptotic energy minimization. FPGA (2013)
Albert Kwon, Udit Dhawan, Jonathan M. Smith, Thomas F. Knight Jr., André DeHon
Low-fat pointers: compact encoding and efficient gate-level implementation of fat pointers for spatial safety and capability-based security. CCS (2013)
Benjamin Gojman, Sirisha Nalmela, Nikil Mehta, Nicholas Howarth, André DeHon
GROK-LAB: generating real on-chip knowledge for intra-cluster delays using timing extraction. FPGA (2013)
Udit Dhawan, André DeHon
Area-efficient near-associative memories on FPGAs. FPGA (2013)
Yutian Huan, André DeHon
FPGA optimized packet-switched NoC using split and merge primitives. FPT (2012)
Nikil Mehta, Raphael Rubin, André DeHon
Limit study of energy & delay benefits of component-specific routing. FPGA (2012)
Nachiket Kapre, André DeHon
${\rm SPICE}^2$: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (1) (2012)
Udit Dhawan, Albert Kwon, Edin Kadric, Catalin Hritcu, Benjamin C. Pierce, Jonathan M. Smith, André DeHon, Gregory Malecha, Greg Morrisett, Thomas F. Knight Jr., Andrew Sutherland, Tom Hawkins, Amanda Zyxnfryx, David K. Wittenberg, Peter Trei, Sumit Ray, Greg Sullivan
Hardware Support for Safety Interlocks and Introspection. SASO Workshops (2012)
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, André DeHon
Spatial hardware implementation for sparse graph algorithms in GraphStep. ACM Trans. Auton. Adapt. Syst. 6 (3) (2011)
Nachiket Kapre, André DeHon
An NoC Traffic Compiler for Efficient FPGA Implementation of Sparse Graph-Oriented Workloads. Int. J. Reconfigurable Comput. 2011 (2011)
André DeHon, Ben Karel, Thomas F. Knight Jr., Gregory Malecha, Benoît Montagu, Robin Morisset, Greg Morrisett, Benjamin C. Pierce, Randy Pollack, Sumit Ray, Olin Shivers, Jonathan M. Smith, Gregory Sullivan
Preliminary design of the SAFE platform. PLOS@SOSP (2011)
André DeHon, Benjamin Gojman
Crystals and Snowflakes: Building Computation from Nanowire Crossbars. Computer 44 (2) (2011)
Raphael Rubin, André DeHon
Timing-driven pathfinder pathology and remediation: quantifying and reducing delay noise in VPR-pathfinder. FPGA (2011)
Raphael Rubin, André DeHon
Choose-your-own-adventure routing: Lightweight load-time defect avoidance. ACM Trans. Reconfigurable Technol. Syst. 4 (4) (2011)
Nachiket Kapre, André DeHon
VLIW-SCORE: Beyond C for sequential control of SPICE FPGA acceleration. FPT (2011)
Nachiket Kapre, André DeHon
An NoC Traffic Compiler for efficient FPGA implementation of Parallel Graph Applications. ReCoSoC (2010)
André DeHon, Heather M. Quinn, Nicholas P. Carter
Vision for cross-layer optimization to address the dual challenges of energy and reliability. DATE (2010)
Karl Papadantonakis, Nachiket Kapre, Stephanie Chan, André DeHon
Pipelining Saturated Accumulation. IEEE Trans. Computers 58 (2) (2009)
Nachiket Kapre, André DeHon
Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors. FPL (2009)
Benjamin Gojman, André DeHon
VMATCH: Using logical variation to counteract physical variation in bottom-up, nanoscale systems. FPT (2009)
Helia Naeimi, André DeHon
Fault Secure Encoder and Decoder for NanoMemory Applications. IEEE Trans. Very Large Scale Integr. Syst. 17 (4) (2009)
Deming Chen, Russell Tessier, Kaustav Banerjee, Mojy C. Chian, André DeHon, Shinobu Fujita, James Hutchby, Steve Trimberger
CMOS vs Nano: comrades or rivals? FPGA (2009)
Raphael Rubin, André DeHon
Choose-your-own-adventure routing: lightweight load-time defect avoidance. FPGA (2009)
Nachiket Kapre, André DeHon
Accelerating SPICE Model-Evaluation using FPGAs. FCCM (2009)
Benjamin Gojman, Harika Manem, Garrett S. Rose, André DeHon
Inversion schemes for sublithographic programmable logic arrays. IET Comput. Digit. Tech. 3 (6) (2009)
André DeHon, Mike Hutton
Guest Editorial: TRETS Special Edition on the 15th International Symposium on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 1 (1) (2008)
Nachiket Kapre, André DeHon
Optimistic Parallelization of Floating-Point Accumulation. IEEE Symposium on Computer Arithmetic (2007)
André DeHon, Craig S. Lent, Fabrizio Lombardi
Introduction to the Special Section on Nano Systems and Computing. IEEE Trans. Computers 56 (2) (2007)
André DeHon, Jean-Louis Giavitto, Frédéric Gruau
06361 Executive Report -- Computing Media Languages for Space-Oriented Computation. Computing Media and Languages for Space-Oriented Computation (2007)
Kia Bazargan, André DeHon
Guest Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (2) (2007)
André DeHon, Jean-Louis Giavitto, Frédéric Gruau
06361 Abstracts Collection -- Computing Media Languages for Space-Oriented Computation. Computing Media and Languages for Space-Oriented Computation (2007)
Helia Naeimi, André DeHon
Fault tolerant nano-memory with fault secure encoder and decoder. Nano-Net (2007)
André DeHon
Architecture approaching the atomic scale. ESSCIRC (2007)
Helia Naeimi, André DeHon
Fault Secure Encoder and Decoder for Memory Applications. DFT (2007)
Benjamin Gojman, Raphael Rubin, Concetta Pilotto, André DeHon, Tetsufumi Tanamoto
3D Nanowire-Based Programmable Logic. Nano-Net (2006)
Rajiv V. Joshi, Kaustav Banerjee, André DeHon
Tutorial 1: Emerging Technologies for VLSI Design. ISQED (2006)
André DeHon, Randy Huang, John Wawrzynek
Stochastic spatial routing for reconfigurable networks. Microprocess. Microsystems 30 (6) (2006)
Nachiket Kapre, Nikil Mehta, Michael DeLorimier, Raphael Rubin, Henry Barnor, Michael J. Wilson, Michael G. Wrighton, André DeHon
Packet Switched vs. Time Multiplexed FPGA Overlay Networks. FCCM (2006)
Michael G. Wrighton, André DeHon
SAT-based optimal hypergraph partitioning with replication. ASP-DAC (2006)
John E. Savage, Eric Rachlin, André DeHon, Charles M. Lieber, Yue Wu
Radial addressing of nanowires. ACM J. Emerg. Technol. Comput. Syst. 2 (2) (2006)
Kumiko Nomura, Keiko Abe, Shinobu Fujita, André DeHon
Novel Design of Three-Dimensional Crossbar for Future Network on Chip based on Post-Silicon Devices. Nano-Net (2006)
André DeHon, Yury Markovsky, Eylon Caspi, Michael Chu, Randy Huang, Stylianos Perissakis, Laura Pozzi, Joseph Yeh, John Wawrzynek
Stream computations organized for reconfigurable execution. Microprocess. Microsystems 30 (6) (2006)
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, Dominic Rizzo, Ian Eslick, Raphael Rubin, Tomás E. Uribe, Thomas F. Knight Jr., André DeHon
GraphStep: A System Architecture for Sparse-Graph Algorithms. FCCM (2006)
André DeHon, Konstantin Likharev
Hybrid CMOS/nanoelectronic digital circuits: devices, architectures, and design automation. ICCAD (2005)
André DeHon, Helia Naeimi
Seven Strategies for Tolerating Highly Defective Fabrication. IEEE Des. Test Comput. 22 (4) (2005)

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Publication Activity (10 Years)

Top Topics

Top Venues

André DeHon