PLD: fast FPGA compilation to make reconfigurable acceleration compatible with modern incremental refinement software development.
Yuanlong XiaoEric MicallefAndrew ButtMatthew HofmannMarc AlstonMatthew GoldsmithAndrew Merczynski-HaitAndré DeHonPublished in: ASPLOS (2022)
Keyphrases
- software development
- field programmable gate array
- hardware implementation
- systolic array
- digital signal
- code generation
- low cost
- software engineering
- software systems
- case study
- incremental learning
- development process
- reconfigurable architecture
- reconfigurable hardware
- power reduction
- embedded systems
- software design
- hardware design
- fpga implementation
- software projects
- image processing algorithms
- parallel computing
- software components
- real time
- hardware architecture
- software implementation
- software reuse
- general purpose
- parallel architecture
- dedicated hardware
- general purpose processors
- agile software development
- development lifecycle
- xilinx virtex
- hardware software co design
- pair programming
- hardware software
- software evolution
- software developers
- hardware and software
- software architecture
- knowledge management