Mike Hutton

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 5

Top Topics

Annual Computer Personnel Research Conference

Workshop Proceedings

Pipelined Architecture

Top Venues

Hot Chips Symposium

ACM Trans. Reconfigurable Technol. Syst.

Publications

Yi He, Mike Hutton, Steven Chan, Robert De Gruijl, Rama Govindaraju, Nishant Patil, Yanjing Li
Understanding and Mitigating Hardware Failures in Deep Learning Training Systems. ISCA (2023)
Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang
The First 25 Years of the FPL Conference: Significant Papers. ACM Trans. Reconfigurable Technol. Syst. 10 (2) (2017)
Mike Hutton
Stratix® 10: 14nm FPGA delivering 1GHz. Hot Chips Symposium (2015)
Jeffrey Tyhach, Mike Hutton, Sean Atsatt, Arifur Rahman, Brad Vest, David M. Lewis, Martin Langhammer, Sergey Y. Shumarayev, Tim Hoang, Allen Chan, Dong-Myung Choi, Dan Oh, Hae-Chang Lee, Jack Chui, Ket Chiew Sia, Edwin Kok, Wei-Yee Koay, Boon-Jin Ang
Arria™ 10 device architecture. CICC (2015)
Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang
Significant papers from the first 25 years of the FPL conference. FPL (2015)
Brad Vest, Sean Atsatt, Mike Hutton
Design of a high-density SoC FPGA at 20nm. Hot Chips Symposium (2014)
Yan Lin, Lei He, Mike Hutton
Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 16 (2) (2008)
André DeHon, Mike Hutton
Guest Editorial: TRETS Special Edition on the 15th International Symposium on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 1 (1) (2008)
Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig
Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. ICCAD (2007)
Paul Chow, Mike Hutton
Integrating FPGAs in high-performance computing: introduction. FPGA (2007)
Dwayne Burns, Ciaran Toal, Kieran McLaughlin, Sakir Sezer, Mike Hutton, Kevin Cackovic
An FPGA Based Memory Efficient Shared Buffer Implementation. FPL (2007)
Yan Lin, Mike Hutton, Lei He
Statistical placement for FPGAs considering. IET Comput. Digit. Tech. 1 (4) (2007)
Joachim Pistorius, Mike Hutton, Jay Schleicher, Mihail Iotov, Enoch Julias, Kumara Tharmalingam
Equivalence Verification of FPGA and Structured ASIC Implementations. FPL (2007)
Jun Mu, Sakir Sezer, Gareth Douglas, Dwayne Burns, Emi Garcia, Mike Hutton, Kevin Cackovic
Accelerating pattern matching for DPI. SoCC (2007)
Shuo Zhou, Yi Zhu, Yuanfang Hu, Ronald L. Graham, Mike Hutton, Chung-Kuan Cheng
Timing model reduction for hierarchical timing analysis. ICCAD (2006)
Mike Hutton
FPGA Architecture Design Methodology. FPL (2006)
Lerong Cheng, Jinjun Xiong, Lei He, Mike Hutton
FPGA Performance Optimization Via Chipwise Placement Considering Process Variations. FPL (2006)
Mike Hutton, Yan Lin, Lei He
Placement and Timing for FPGAs Considering Variations. FPL (2006)
Boris Ratchev, Mike Hutton, David Mendel
Coping With Uncertainty in FPGA Architecture Design. FPL (2005)
Lei He, Mike Hutton, Tim Tuan, Steven J. E. Wilton
Challenges and opportunities for low power FPGAs in nanometer technologies. ISLPED (2005)
Mike Hutton, David Karchmer, Bryan Archell, Jason Govig
Efficient static timing analysis and applications using edge masks. FPGA (2005)
David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David R. Galloway, Mike Hutton, Christopher Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron McClintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose
The Stratix II logic and routing architecture. FPGA (2005)
Mike Hutton
Advances and trends in FPGA design. SBCCI (2004)
Paul Leventis, Brad Vest, Mike Hutton, David M. Lewis
MAX II: A low-cost, high-performance LUT-based CPLD. CICC (2004)
Mike Hutton
Architecture and CAD for FPGAs. SBCCI (2004)
Joachim Pistorius, Mike Hutton
Placement rent exponent calculation methods, temporal behaviour and FPGA architecture evaluation. SLIP (2003)